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Research On Device Characteristics And Parallel Technique Of Silicon Carbide MOSFET

Posted on:2022-05-04Degree:MasterType:Thesis
Country:ChinaCandidate:C YuFull Text:PDF
GTID:2518306533475504Subject:Electrical engineering
Abstract/Summary:PDF Full Text Request
As the most representative third generation of wide bandgap semiconductor power switching devices,SiC MOSFET has many advantages such as fast switching speed,high voltage resistance,high temperature resistance,small loss and strong radiation resistance,showing great development potential in the field of power electronics technology.The switching speed of SiC devices increases by five to ten times,which is beneficial to reduce the switching loss of the devices.However,the increasing of the switching speed will greatly enhance the sensitivity of the dynamic characteristics of the devices to parasitic parameters in the circuit,which will bring a lot of technical problems to the application of SiC MOSFET.In addition,SiC MOSFET has a positive temperature coefficient,so it is easy to use in parallel.This paper focuses on the influence of parasitic parameters on device characteristics and parallel characteristics of SiC MOSFET.The specific research contents are as follows:(1)By comparing the basic parameters and static characteristics of SiC MOSFET and Si IGBT,the advantages and disadvantages of their respective electrical characteristics are obtained.The parameters of the DPT circuit were designed,and the hardware platform of DPT circuit was built.In terms of parameter design,the parameter range of the parasitic inductance and the gate resistance is calculated.In terms of parameter design,the parameter range of the gate drive resistance and the parasitic inductance are calculated.In terms of hardware,the main circuit of the DPT and the driver circuit of the SiC MOSFET are included.(2)The effects of parasitic circuit parameters on the characteristics of SiC MOSFET devices are analyzed by simulation,including gate-source capacitance,gatedrain capacitance,drain-source capacitance,power loop parasitic inductance and gate resistance.Based on simulation analysis of turn-off overvoltage and high-speed switching oscillation,the causes of crosstalk of SiC MOSFET are analyzed in detail in seven stages.A drive circuit for suppressing crosstalk of SiC MOSFET is improved,and its effectiveness is proved by experiments.(3)The causes of current-unbalance in dynamic and steady state stages are analyzed respectively,and the relationship of the three-pin Kelvin SiC MOSFET between the parasitic parameters and the voltage of the gate-source is deduced.The influence of parasitic parameters,such as on-resistance and parasitic inductance,on the current leveling is analyzed.Then,the influence of different parallel circuit parameters on the equalizing current effect of SiC MOSFET is analyzed by simulation.(4)A scheme of coupling inductance to suppress unbalanced current is analyzed,and the existing problems of coupling inductance for discrete windings are presented.Then,the winding mode is slightly improved,and a scheme of current equalizing by consistent winding coupling the inductor in series is proposed,which solves the negative effects of discrete winding to some extent.Finally,the current sharing effect of parallel circuit without current sharing measure,discrete winding coupling inductance and consistent winding coupling inductance is compared by experiments,and the feasibility of the scheme is verified.
Keywords/Search Tags:SiC MOSFET, parasitic parameter, parallel connection, equalizing current, coupling inductance
PDF Full Text Request
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