Research And Realization Of Efficient Dynamic Channelization Technology

With the continuous development of mobile communication technology,5G communication can support larger bandwidths and more complex signals.At the same time,the signal density in the frequency band is greater,and sometimes it is necessary to use multiple blank spectrums that are not continuous and have unfixed locations and bandwidths.Supports high-speed data transmission.The channelization technology has the characteristics of large instantaneous reception bandwidth,real-time signal reception,high frequency resolution,and can separate signals that overlap in the time domain but not in the frequency domain,and is very suitable for signal reception in this scenario.However,the channelization technology also faces some problems.For example,the fixed channel division method is difficult to adapt to complex and changeable scenarios,and the large increase in the number of channels leads to huge resource consumption.Aiming at the former,the paper adopts real-time adjustable dynamic channelization technology of sub-channel center frequency and bandwidth,and implements a dynamic channelization module that can configure the number of sub-channels in real time on the hardware platform,so as to obtain more flexible sub-channel division.In view of the latter,the paper adopts an efficient structure based on WOLA in the algorithm design,and simplifies and improves the algorithm,thereby reducing the amount of calculation.The thesis work mainly includes the following points:1)Researched and designed dynamic channelization technology based on analysis-synthesis filter bank: WOLA-based high-efficiency structure removes the integer multiple restriction between the number of channels and decimation/interpolation factors,and parallel DDC compared with the high-efficiency structure based on polyphase filtering,the DDC structure can obtain higher flexibility while reducing the amount of calculation;the threshold update detection algorithm based on autocorrelation accumulation can improve the OR under low signal-to-noise ratio.The detection accuracy rate when the noise energy changes.2)The algorithm is improved according to the hardware implementation platform characteristics: the decimation is moved before mixing and filtering,the interpolation is moved after mixing and filtering,and the mixing operation is replaced by a cyclic shift method,and the recursive method is used.Autocorrelation accumulation calculation reduces the complexity and resource consumption of hardware implementation.3)Encapsulate the dynamic channelization module into an IP core that is easy to reuse.It supports online dynamic configuration of sampling rate,number of sub-channels,and decimation/interpolation factors.The maximum number of sub-channels is only subject to Limited to chip resources,it can adapt to a variety of different application requirements.The paper uses Xilinx Zynq XC7Z100 as the implementation platform to encapsulate and test the IP core.On this chip,the IP core can process wideband signals with a sampling rate of up to 102.4MHz,and can support up to 128 channels of channel separation and 16 channels of channel synthesis.