Implementation And Verification Of A Piecewise Linearized Digital Predistortion

With the rapid development of mobile communications in recent years,people have increasingly higher requirements for communication systems.The RF power amplifier is a necessary component of the wireless communication system.It operates in the nonlinear region will cause serious distortions in-band and out of band spectral leakage.In the linearization technology to solve this kind of nonlinear distortion,digital predistortion is widely used.The choice of the memory nonlinear model in the digital predistortion system will directly affect the performance of the system.Unlike the traditional memory polynomial model,the piecewise linearization technology treats the nonlinear system as the superposition of several linear systems,It reduces the complexity of the model.Taking into account the advantages of the piecewise linearization model,this thesis designs and implements a digital predistortion system based on the piecewise linearization model.The main contents are as follows:First,analyze the distortion characteristics of the RF power amplifier and the principle of digital predistortion.This article compares and analyzes typical nonlinear models,predistortion learning structures,and common model extraction algorithms.Determine the selection of the piecewise linear model,the pre-distortion indirect learning structure and the inverse equation method to obtain the model parameters.Second,the overall scheme of the piecewise linearization digital predistortion system is given.The predistortion parameter calculation module and the predistortion module are described in detail.The method of FPGA combined with Micro Blaze soft core to realize parameter calculation is determined.The pre-distortion module is realized by an iterative structure,and the number of iterations is determined to be 3through simulation experiments.And the feasibility of the scheme was verified by simulation experiment.Third,the FPGA implementation of the piecewise linearized digital predistortion system is completed.The implementation of the piecewise linearized digital predistortion system is divided into: predistortion module,signal source module,data selection module,gain control module,soft core interface module,and Micro Blaze soft core.Introduce the internal structure and work flow of each part in detail.Fourth,the test and analysis of the piecewise linearized digital predistortion system are carried out.Set up a test environment on the software radio platform to verify the performance of the piecewise linearized digital predistortion system.Verify the difference in predistortion effect of different iteration times.The performance is compared with the digital predistortion realized by the LMS algorithm.The test results show that ACLR increases by about 15 d B as the number of iterations increases.Compared with the traditional predistortion system implemented by the LMS algorithm,the ACLR improvement value of this scheme is increased by about20 d B.The piecewise linearization system designed in this thesis has achieved initial results.