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Research And Implementation Of Digital Predistortion Technology In Multimode Communication Systems

Posted on:2015-06-03Degree:MasterType:Thesis
Country:ChinaCandidate:P SuFull Text:PDF
GTID:2298330431450676Subject:Electronic Science and Technology
Abstract/Summary:PDF Full Text Request
As a kind of power amplifier linearization techniques, digital predistortion whichcan improve the power efficiency, reduce the power consumption of the system, andimplement green communication has very important role. The existing digitalpredistortion scheme is aimed at a single mode communication system, withoutconsidering the characteristics of the multimode communication system. In multimodecommunication systems, the memory effect of power amplifier will change with thechange of the input signal bandwidth. The predistortion scheme based on polynomialmodel has to change the memory depth to track the memory effect of the poweramplifier, so it’s not suitable for direct application in the multimode communicationsystem.To solve above problems, some people put forward a new kind of frequencydomain approximation model, this model tries to simplify the system function Volterrain frequency domain, avoiding the impact of the length of time parameters on themodel, theoretically clarifying the relationship between signal bandwidth and memoryeffects. This model is more suitable for multimode communication system. But thismodel which only proved in theory and simulation cases, has not implemented.Based on the background of digital predistortion and the theoretical research ofthe new model, the implementation of DPD technology were studied. TraditionallyDPD was implemented on an ASIC or FPGA+DSP. With the current rapiddevelopment of FPGA technology, to realize a complete DPD IP core on a piece ofFPGA is possible.In this paper, we adopt the system design methodology based on the SystemGenerator, which combining simulation with implementation so as to enhance thedevelopment period. Predistortion cell of this article is implemented on polynomiallookup table circuit. Parameter extraction section is implemented in the CPU core,especially the parameter extraction algorithm based on SVD decomposition isproposed, accelerating the algorithm convergence speed, improving the stability ofcoefficient calculation.Finally, the DPD IP core propsed by this paper has been test in the actualhardware environment and the experiment platform based on the instrument, the testresults show that the ACPR can improve about10-15dB, so that our DPD IP core can effectively improve the linearity of the power amplifier and can be applied to thepractical environment.
Keywords/Search Tags:power amplifier, Digital predistortion, FPGA, Linearization, ACPR, adaptive
PDF Full Text Request
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