The Research Of Evolution Redundancy Repair Online Based On Two Phase Optimization

With the application of evolutionary thought in the evolution design of digital circuits,the electronic circuit system based on evolutionary hardware has the ability of self-organization,self-adaptation and self-repair,and has entered a new research era.Because FPGA has the characteristics of universal applicability and online reconstruction,it is widely used in various electronic circuits,involving a variety of fields,especially in the field of aerospace.The electronic system based on FPGA is faced with complex natural environment,such as high altitude,deep sea,extremely high or low temperature,strong electromagnetic environment and other extreme harsh environment,its performance may be interfered with to degradation or malfunction.Once the electronic system breaks down,it is almost impossible to achieve manual repair,which requires the electronic system based on FPGA must have strong anti-interference ability or online repair ability.In this thesis,an online evolutionary redundancy repair method based on quadratic optimization is studied based on FPGA.The main research contents are as follows:(1)A Systolic array is studied,and the evolutionary algorithm of circuit evolution is improved by combining with Cartesian genetic programming,which can effectively improve the speed of circuit evolution and resource utilization.(2)This thesis analyzes and studies all kinds of faults that may occur in FPGA of field programmable gate array under the action of electromagnetic environment.At the same time,the typical fault repair technology is analyzed,and a two-bit multiplier is taken as an example for experimental research.(3)In this thesis,a two phase optimization method is proposed to repair the system faults under electromagnetic environment.In this method,local optimization mechanism is applied to the redundancy repair technology,and the redundant nodes are used to replace and repair the FPGA fault nodes.The experimental results show that the fault redundancy repair technology based on two phase optimization proposed in this thesis can effectively improve the speed of FPGA fault repair and shorten the fault repair time.