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The Design And Implementation Of Dynamic Object Recognition System Based On FPGA

Posted on:2021-01-19Degree:MasterType:Thesis
Country:ChinaCandidate:H M HuangFull Text:PDF
GTID:2518306470462384Subject:Circuits and Systems
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In recent years,with the rapid development of science and technology,the popularity of artificial intelligence is getting higher and higher.People are paying more and more attention to the field of object recognition,especially the requirement of dynamic recognition is increasing and the real-time is becoming a great significance to recognition technology.Various recognition algorithms have appeared and have been improved greatly in accuracy and speed,which are widely used in embedded processing systems to realize object recognition,but there are still some shortcomings in the real-time.Therefore,researching a set of dynamic real-time object recognition system,which has important application value in the fields of intelligent monitoring,vehicle recognition,face recognition,etc.,has significant research significance and commercial value.This paper designs a dynamic object recognition system based on the hardware platform of Field Programmable Gate Array for the real-time.In order to realize the real-time of dynamic objects recognition,this paper studied some recognition algorithms,and finally selected the YOLO v2-tiny network which is simple and faster.This paper applied the Verilog the hardware description language to design,simulate and verify the hardware acceleration on FPGA.As a development platform,FPGA,which is applied widely in the field of real-time object recognition,has the advantages of small size,low power consumption,parallel operation,etc.The whole system of this design is composed mainly of three parts: video capture module,recognition module and display module.Firstly,the camera is used to capture video stream,and the format is pre-processed to meet the format of the system.Then,a frame of image,which is selected from the video stream at intervals of several frames,is transmitted to recognition module of Convolutional Neural Network(CNN)to extract the image information to obtain all the information that the position of the object is in the video.Finally,marking the position of the object in the video stream and displaying it on the LCD.In order to improve the recognition speed of CNN,this article studies thoroughly the architecture of YOLO v2-tiny and focuses on the accelerated design of convolutional layer and pooling layer.A CNN acceleration module composed of Multiply-and-Accumulate with two 14 * 14 PE matrices is designed and at the same time,all the calculation of CNN will be implemented on the MAC.The data output reuse model is adopted to reduce the complexity of the design and the amount of data access on and off the chip,thereby reducing power consumption.In order to improve the versatility of MAC,this article also made a configurable design,which can be applied to other CNN models.In terms of da ta transmission,the ping-pong operation and pipeline operation are used to improve the data transmission rate.16-bit fixed-point numbers is adopted to the image data and various parameter data of the CNN acceleration module,which can reduce the resource utilization and increase the running speed.As for the acceleration module,its data transfer frequency of outside is 200 MHZ,while its calculation frequency is 100 MHZ.After the design of each module had completed,logic synthesis and implementation are performed on the Vivado,and finally the design is accelerated on the Xilinx Zynq-7000 So C ZC706 development board.The experimental results show that the recognition speed of the entire system can reach10 fps,while the power consumption is only 4.164 W,and the average performance can reach 59.572 GOPS(Giga Operations Per Second)and that can achieve the effect of realtime recognition of dynamic objects.
Keywords/Search Tags:Object recognition, FPGA, YOLO (You Only Look Once), Hardware acceleration, Configurable
PDF Full Text Request
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