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Research On The Acceleration Of Tiny-yolo Convolution Neural Network Based On HLS

Posted on:2018-09-09Degree:MasterType:Thesis
Country:ChinaCandidate:L L ZhangFull Text:PDF
GTID:2348330533961324Subject:Communication and Information System
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Convolution Neural Networks(CNN)have been widely implemented in the field of computer vision,especially in the fields of image recognition,segmentation and target detection,which has get a good application prospect.However,at present,most of the convolution neural network systems are basically implemented under the environment of GPU.Although the GPU can achieve real-time processing,the power consumption and the cost are extremely high.So it is absolutely difficult to meet the requirements of some low-power and low-cost application areas.Therefore,it is of great practical significance to develop a picture detection system with high speed,high accuracy low power consumption.Compared with other convolution neural networks,the YOLO convolution neural network is simple in structure and faster in detection,which is more suitable for low-power consumption devices.There are some related studies to apply YOLO convolution neural network to low-power consumption devices.Due to the low speed of embedded devices of ARM architecture running on the neural network,most of the relative devices are based on dedicated hardware accelerator of FPGA.Compared with the embedded device of ARM architecture,device based on dedicated hardware accelerator of FPGA has obviously improved the speed of target detection.However,it is also difficult to achieve and the development period can be a long time.Through the analysis of the parallelism of the convolution calculation and the parallel features of the Tiny-yolo network structure,the ZC702 development board based on the ARM + FPGA double architecture,using HLS for hardware to accelerate the calculating speed and weighing the running speed with hardware resource consumption.The algorithm is mainly based on the pipeline-parallel processing algorithm,supplemented with the fixed-point processing algorithm,and three IP cores were designed in order to improve the running speed and shorten the development period.The experimental results show that the hardware-accelerated Tiny-yolo network is 6 to 7 times faster than the network without acceleration.As the accelerated network uses fixed-point calculation,compared to the type of original floating-point data network,the target test results have some certain errors.However,the basic detection accuracy can be retained,which is suitable for the field of engineering.
Keywords/Search Tags:Convolution Neural Networks, YOLO, Hardware Acceleration, HLS
PDF Full Text Request
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