Design Of YOLOv3-Tiny Algorithm Based On FPGA

In recent years,neural network-based target detection algorithms have developed rapidly in areas such as autonomous driving,identity authentication,national defense security,and health care.These areas are more of applications in embedded environments,on which device performance and power consumption have a greater impact.And the size has strict requirements.Because neural networks have a huge amount of calculation,it is difficult to achieve performance requirements simply by relying on a general-purpose central processing unit(CPU)calculation,and other processing methods are required to accelerate.In the current mainstream acceleration method,the graphics processing unit(GPU)has a large size and high power consumption,and it is difficult to apply it to an embedded platform with a small size and low power consumption.Application Specific Integrated Circuits(ASICs)are too customized,and cannot keep up with the fast pace of rapid update of neural networks.In contrast,fieldprogrammable gate arrays(FPGA)have the characteristics of low latency,low power consumption,parallel computing,and programmable,and are more suitable for the hardware design of neural networks in the environment of embedded systems.Aiming at the application requirements of automatic driving in the detection of other vehicles in the embedded system environment,this paper implements the hardware acceleration of the target detection algorithm based on convolutional neural network on the FPGA platform.The main work of this paper includes: first,analyze the target detection algorithm of the mainstream neural network,and select the YOLOv3-Tiny algorithm for hardware acceleration.Secondly,a high-level synthesis tool(HLS)was used to design the FPGA-based YOLOv3-Tiny algorithm hardware accelerator,and a pipeline structure and a series of optimization strategies were adopted to convolution,pooling and The upsampling layer,etc.achieves parallel acceleration.In response to the problem of insufficient FPGA resources,this article quantizes 32-bit floating-point numbers into 16-bit fixed-point numbers,which saves FPGA resources and improves operating speed.Finally,this article uses the Pynq-Z2 development board produced by Xilinx to test the accelerator design.In the application scenario of detecting vehicles on the road,the actual photos taken are used as test pictures to verify the effectiveness of the accelerator when detecting vehicles.The experimental results were compared with the experimental results using Intel Core i5-8300 H CPU and NVIDIA Geforce GTX 1050 Ti GPU.Experimental results and comparisons show that this design can accurately detect vehicles on the road,the detection speed has reached twice the detection speed of the CPU used,and the power consumption has a great advantage over the CPU and GPU used.The accelerator designed in this paper accelerates the YOLOv3-Tiny target detection algorithm,which can be used in embedded target detection applications in the field of automatic driving to complete the detection of other vehicles on the road.