Research And Design Of High Linear Power Amplifier Applied In Short-range Wireless Communication

With the continuous development of modern communication,modern communication systems are developing in multi-directions such as higher information throughput,faster data transmission rate,more energy-saving and environmental protection,etc.In order to achieve these performances in limited spectrum bandwidth as well as improve the spectrum utilization efficiency and reduce network delays,modern communication systems adopt more complex modulation techniques.Moreover,it expands new frequency ranges to ease the strain on existing spectrum resources.Due to the use of more complex modulation techniques,modern communication system signals bring higher peak-to-average ratio(PAR).In order to ensure the linear propagation of the signal,power amplifier needs to work at a lower back-off power point,which brings bigger challenges to the design of power amplifiers.Because of its advantages of higher mobility and higher speed data transmission,Wireless LAN communication has developed rapidly in recent years and has been widely used in many fields.The fifth generation and the newly released sixth-generation Wireless LAN communication meet people's requirements for low-latency communication and high-speed large-volume data transmission well with its ultra-high information throughput and ultra-high data transmission rate.Firstly,the thesis analyzes the various characteristics of the power amplifier as well as several traditional power amplifiers in detail,and discusses several linearization techniques.Then it introduces the relevant theories of the process used in this paper,and analyzes the GaAs HBT device model as well as passive device model.Additionally the layout parameters of the process are given.Finally,a GaAs HBT process provided by a well-known company in Taiwan was used to design a high linear power amplifier.The power amplifier operates at 5.15 GHz ? 5.85 GHz,which is aimed for the applications of short-distance wireless communication and 802.11 ac standard.Based on the design specifications,for achieving high linearity characteristics,the power amplifier in this paper is implemented with a three-level circuit,using an adaptive linear bias circuit and an output matching network with harmonic suppression.Moreover,this paper proposes a temperature compensated on-chip power detector.The author used Keysight ADS simulation software for circuit simulation,and Cadence software for layout design.Besides,Author designed an EVB board and did the co-simulation between the layout and schematic diagram.Finally,the power amplifier was taped out and tested.The test results show that the saturation output power of the power amplifier was 31.4d Bm with P1 d B at 29.8d Bm,S21 at 30.1d B,and ?S21 less than 1d B.When the output power was at 22 d Bm and the test signal was set under 802.11ac(80MHz,256QAM),the EVM was-35 d B,which well met the design specifications.According to the results,we can see good correlation between theory and experiment this paper proposed.