Hybrid Memory Design Of ARM Server

In recent years,improvements in central processor architecture driven by Moore's Law have led to rapid development of processor performance and multi-core technology.ARM CPUs are typical multicore architectures which may consist dozens of core in a single chip.However,multi-core technology has exacerbated contention for memory bandwidth in the system,resulting in the performance degradation of memory-intensive applications.The performance gap between the memory system and the processor is growing,and memory access latency has become one of the main bottlenecks that restricts system performance.In order to meet the requirements of multi-core processors for data access bandwidth and delay,the emerging hybrid storage system has become an attractive choice to continue to expand storage performance.For the consideration of cost and power consumption,this paper proposes a hybrid memory system composed of small-capacity SRAM and largecapacity DRAM to solve the problem of insufficient memory bandwidth of the ARM server.Furthermore,in order to improve the efficiency of the hybrid memory,the scheme uses a hot data placement strategy based on last-level cache(LLC)reuse distance which caches hot pages into low-latency SRAM.To further alleviate the pressure on the bandwidth of the main memory,the scheme redesigns the LLC replacement algorithm to adapt to the hybrid memory architecture,which alleviates the phenomenon of hot data back and forth between the main memory and the LLC.The memory access trace generated by the radio base station server program is used to test the hybrid memory system in the hybrid simulator.The experimental results show that compared with the traditional DRAM-only memory system,the average memory access latency of the hybrid memory system decreases by 60%.The results also show that compared with the traditional replacement algorithm,the missing rate of LLC drops by approximately 10% after applying the improved replacement algorithm.