Implementation Of Moving Target Detection Algorithm Based On FPGA

With the development of computer vision,as a key issue in the field of computer vision,moving target detection has become a research hotspot.The moving target detection technology can analyze the video frame by frame and detect the moving target in each frame of image.At present,the application of this technology is very wide.For example,common video surveillance can achieve moving target detection.In addition,it is also used in some cutting-edge technology fields such as intelligent transportation and unmanned driving.In these areas,it is particularly important to build a small hardware platform with low power consumption to achieve moving target detection.This article first studies the moving target detection algorithm and introduces several commonly used algorithms.Among them,Vi Be algorithm is a video background modeling algorithm,which has the advantage of instantaneous initialization.The sample model can be quickly initialized with only one frame of image,so that detection can be performed in the second frame of the video.Compared with other algorithms,it has the advantages of simple idea,high efficiency,more sensitive to the detection of small and weak targets and easy to realize,so the Vi Be algorithm is selected for hardware platform implementation.In addition,this article improves the algorithm,which can improve the adaptability of the algorithm and make it adapt to the complex background well.Through comparative experiments in MATLAB,it can be seen that the improved algorithm has better processing effect on the complex background.FPGA contains rich logic resources and has the advantage of parallelism which can use pipelined working mode at runtime.Therefore,this article selects FPGA as the algorithm processing unit and designs a set of moving target detection system based on the current mainstream ZYNQ platform.The system uses OV5640 camera to collect video images,sends the images to the algorithm initialization module to generate the sample sets,then sends the subsequent images and sample sets to the algorithm detection module to obtain the moving target and the updated sample sets,and stores the image data in DDR through VDMA,HDMI is used to output the detection result.However,when there are fewer onchip FPGA resources,more sample sets cannot be stored,which affects the detection effect.In this article,a solution based on a window buffer is innovatively proposed to store the sample sets in an external storage space.In the method,the sample set is read from the external storage space by constructing a window buffer,so that more sample sets can be stored to improve the detection effect,and the problem that the algorithm has limited storage resources on the low-cost FPGA is solved.This article uses the Zed Board development board for design.Both OV5640 and HDMI are designed and packaged into IP cores using Verilog.The Vivado HLS development tool is used to complete the development of the improved Vi Be algorithm.Vivado HLS can convert high-level languages into hardware description languages and can be packaged the hardware IP core is transplanted into FPGA,which shortens the development process.In the programmable logic part,we can quickly build the hardware platform by calling the IP core and connecting the IP cores.In the processor system part,it mainly develops the software,uses SDK development tools to configure camera registers and control VDMA read and write addresses.The design of the whole system is completed through the design method of software and hardware cooperation.Finally,according to the test results,it can be seen that the system built in this paper can detect moving targets in real time,and the system is a small hardware platform with low power consumption,which is practical for low-cost applications.