Design And Verification Of Low Power Timer Based On MCU

The Internet of Things is continuously evolving and becoming a key technology and there will be an urgent need of MCU in the future.Timer is the most frequently used module in all peripherals of the MCU and capable of selecting various of clock source,capturing the inputs,comparing the outputs and controlling the power application and motor beyond the capacity of timing function.In this paper,we design a 16-bit low-power timer with adopting the corresponding low-power optimization technology to benefit the development of reducing power consumption.At the same time,this work builds a verification platform that is based on UVM to verify the correctness of the design.The main works of this article are divided into two aspects,the digital design of low-power timer and its verification.(1)We use a top-down method to start the research.First,we make a general plan of the design.The low-power timer is designed to contain three major functional units which are time base unit,synchronization signal unit,the capture comparison unit.Then,the digital design,circuit design and timing design of these modules are implemented.Finally,we design a low-power system of timer which is able to reduce power consumption by at least 75%.At the same time,the gate-level clock technology and operand isolation technology used at the RTL level gain 46.8% for power benefits.(2)As for verification,we make a general plan of the verification in the first.The functional verification points according to each functional unit are extracted in the following.Then we build a UVM verification platform that complies with the characteristics of low-power timer according to the plan.And a large amount of test cases is added for verification in Perl.Finally,we analyze the log information files collected by the script and the simulation waveform diagram and make some improvement.After collecting code coverage and analyzing coverage reports,the finale code coverage reaches a high level of 99.87%.The results of verification demonstrate that the goals of the low-power timer are well achieved.The timer has the capacity of counting,frequency division and reloading functions based on 3 selectable clock sources,input capture,output comparison,and PWM output.Moreover,it can work in multiple slave modes and achieve normal communication with the MCU core.Thus,we believe that this work shows prominent contribution in the research of the design of timer.