Optimization Design Of General Compiler For Neural Network Processor

Artificial neural network(ANN)is a hot research field in recent years,because it has been widely used in the fields of artificial intelligence and pattern recognition.At present,most neural network algorithms are used to accelerate calculations on general desktop computing devices such as CPUs and GPUs.In order to extend its application to the mobile field,it is also necessary to deploy the neural network calculation in the embedded environment,so the programmable neural network processor based on FPGA came into being.However,due to the characteristics of massive data operations based on neural networks,we must first clarify the exchange and transmission of various types of data and the storage structure in memory,so that we can build the correct data flow and instruction flow to control the work of network processors.Because the neural network contains many types of parameters,and its structure is also diverse,so how to design the specific exchange and storage structure of different data types under different conditions and structures,so that it can not only be convenient for transmission,addressing,but also make reasonable use of storage resources,is an important problem to be solved in the application of embedded neural network.At the same time,if a deep and large-scale network is encountered,only developers can write instructions manually,which is not only time-consuming and inefficient,but also prone to errors,which is not conducive to the application of neural network processor.To solve these problems,this paper designs and implements a general software compiler of neural network processor based on TTA structure.The user inputs the neural network structure,data types and parameters,and hardware resource parameters through the visual interface of the compiler software.The compiler will synthesize these information,determine which exchange and storage structure these data correspond to,and automatically generate instruction program and configuration information based on them,so as to realize the universality of compiler software.The main work and contribution of this paper are as follows:(1)In order to adapt to the changes of neural network model and different processor parameters,the structure of similar pagination image storage and the structure of segmentation and combination weight storage are designed to realize the parameter generality of compiler.The use of dynamic address can also effectively reduce the waste of storage space.(2)The transmission rules and instruction streams suitable for a variety of neural network structures are designed to achieve the generality of the compiler's structure.(3)Optimized the TTA operation control instructions and network structure configuration instructions,so that they can dynamically change the bit width of each part according to different situations,so as to make full use of each bit in the instruction,it can also save storage resources.(4)The compiler software with friendly interface is realized,which can not only initialize data format automatically,but also generate instructions automatically.The general compiler of neural network processor implemented in this paper can not only design and generate instruction programs for images,weights and bias data under different parameters,but also be applied to different neural network structures,and at the same time,it can be automated to improve efficiency.