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Design And Implementation Of IEEE 1588v2 Precise Time Synchronization System On Pure Hardware

Posted on:2021-10-02Degree:MasterType:Thesis
Country:ChinaCandidate:L F ZhouFull Text:PDF
GTID:2518306047985459Subject:Communication and Information System
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With the rapid development of modern communication technology,the requirement of real-time and certainty of "time sensitive" business transmission in industrial control,transportation and other network systems is increasing.Therefore,on the basis of traditional Ethernet which is widely used,adding network synchronization function can promote traditional network technology to further adapt to the needs of the new era and radiate more energy.In this thesis,the key technology research and system development of synchronous deterministic network(TTE)is combined with the scientific research project,and the realization of 1588v2 time synchronization system by pure hardware is emphasized.In this thesis,firstly,the background,development status and basic definition of 1588v2 time synchronization are introduced;Secondly,based on PTP protocol,the working principle of 1588v2 time synchronization is described in detail;Thirdly,the design of 1588v2 synchronization system is completed by hardware only,with emphasis on the work flow and modular design of clock state selection function,peer-to-peer delay function and synchronous dual redundancy function,the module of peer-to-peer delay function is divided into two parts: sending module and receiving module;Finally,the function of the synchronization system is simulated and verified at the board level.The test results show that the 1588v2 synchronization system designed in this thesis can meet the needs of time trigger system for high-precision time synchronization,and work stably and reliably,and achieve the expected goal.The innovations of this thesis are as follows: first,based on IEEE 1588v2 protocol,a dual redundant synchronization architecture is designed,which has high stability and generality;second,the 1588v2 synchronization technology used in this design can adapt to the working mode with the network interface rate of 10/100/1000 Mbps,which improves the adaptability of the synchronization system;Thirdly,a time synchronization method with best master clock algorithm is designed and implemented on TTE switching platform,which improves the reliability and fault tolerance of synchronization system.
Keywords/Search Tags:TTE, IEEE 1588v2, time synchronization, master-slave clock
PDF Full Text Request
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