An Industrial Control Network Clock Synchronization System Based On IEEE 1588v2

With the rapid development of modern information technology,industrial field control networks are gradually moving towards decentralization and intelligence.However,traditional fieldbus technology can no longer meet these new demands.Ethernet has developed rapidly due to its openness and high bandwidth,but its asynchronous nature makes it difficult to achieve high-precision coordinated control between devices.Therefore,researching clock synchronization technology for various control terminals in industrial field control networks has important practical significance for distributed multi-node coordinated control.This article finds through comparative analysis of existing clock synchronization technologies that the IEEE 1588 protocol can achieve precise clock synchronization among nodes in the network without changing the existing industrial Ethernet architecture and can further improve synchronization accuracy through frequency compensation.In addition,for industrial field control networks,the network scale is relatively small and the topology is mainly tree and linear.Based on these characteristics,the main research content of this article is as follows:(1)For industrial control networks with tree topology,the independence between nodes is considered,which leads to the divergent growth of clock deviation between nodes.This article designs a tree topology clock synchronization system based on FPGA.Using FPGA as the master-slave node controller and through the IEEE 1588v2 protocol stack,clock synchronization among nodes is achieved,mainly including the IEEE 1588 message identification module and timestamp marking module.To solve the problem of inconsistent clock frequencies between nodes,a dynamic frequency compensation module is designed to adjust the clock phase of the local system clock using a dynamic frequency compensation algorithm.Simulation results show that the dynamic frequency compensation algorithm significantly reduces the clock deviation between nodes.(2)In industrial control networks with linear topology,this article designs a linear topology clock synchronization system based on FPGA to address the inconsistency of clock among nodes caused by multi-hop routing.Based on the tree topology clock synchronization system,this system uses FPGA as the slave node controller and achieves clock synchronization among nodes through the IEEE 1588v2 protocol stack,mainly including message identification module and timestamp marking module.To reduce the clock deviation between master-slave nodes and slave-slave nodes caused by multi-hop routing,this article first implements a data forwarding module to enable parallel transmission between slave nodes through data forwarding and parsing,reducing the uncertainty of delay caused by multi-hop routing.Then,by constructing a local clock adjustment module,transmission delay measurement module,clock offset measurement module and dynamic frequency compensation algorithm module,functions such as frequency-adjustable system clock and compensation for transmission delay are achieved.In addition,the feasibility of the method is verified through simulation tests.(3)This article builds a clock synchronization system test platform based on FPGA.The clock synchronization systems for tree and linear topologies are tested in practice.The master device periodically sends synchronization messages to synchronize the system and periodically sends control command messages to bring the clock deviation between each node and the master node back to the master device for analysis.Experimental results show that in tree and linear topology networks with one master and multiple slaves,the clock synchronization accuracy between nodes can reach the nanosecond level,and the clock synchronization system designed in this article can meet the requirements of clock synchronization accuracy in the industrial control field.