Optimized Methods Of Implementing Deep Convolution Neural Network Based On FPGA

Deep learning has gradually played an important role in various fields and Deep Convolutio n Neural Network(DCNN)is the key technology in deep learning.DCNN uses multilevel convolution layer as the core to form a neural network that can extract image features,which is widely used in target detection,target classification,semantic segmentation and other fields.With the development of hardware calculation force,complex neural network structure can be gradually implemented in various devices,so precision gradually becomes the most important performance index of neural network.Therefore,DCNN,whose main advantage is high precision,is favored by researchers.However,due to the large size of DCNN network model and the large amount of computation and parameters,there are still many difficulties in the efficient implementation of DCNN.For example,when the network structure of DCNN is too complex,over-fitting problems are easy to occur during the training,which makes the accuracy of DCNN difficult to meet the requirements.In addition,DCNN,which is implemented in hardware,takes up a large amount of computing resources and storage space,which makes it difficult to apply to scenes with faster processing speed and smaller scale of running equipment.In order to solve the above technical difficulties,this paper studies,summarizes and improves the existing DCNN implementation methods from the perspectives of network structure opt imization and hardware implementation optimization,and proposes several new DCNN imp lementation optimization methods.In addition,a lightweight DCNN——Agile Net is built,trained and tested by using the network structure optimization methods.Then the hardware optimization methods are used to implement the classifier based on Agile Net in Field Progr ammable Gate Arrays(FPGA),and its correctness and important parameters are tested.Fin ally,the test results of software and hardware are analyzed respectively to verify the effectiv eness of the proposed DCNN implementation optimization method.The main work and contributions of this paper are as follows:1)For each component of DCNN,the optimization design method was studied,and a lightwe ight DCNN network,Agile Net,was built and trained.The accuracy of the network is similar to that of the classic network Inception-v3,but the network model is smaller and the network structure is more reasonable.2)Using C++ language,the hardware optimization techniques such as pipeline and paralleli zation are applied in Vivado HLS to complete the FPGA hardware implementation of Agile Net image classifier.Tests show that the classifier is better than GPU and CPU in terms of resource usage and processing speed.