Research And Implementation Of Adaptive Voltage Stack Circuit For Low Standby Power Microcontroller Unit

With the rapid development of Internet of Things(Io T),the demand for microcontroller unit(MCU)applied in wearable devices has grown rapidly.Limited by the battery power,low-power microcontroller unit is an increasing concern for So C design.Since MCU works in sleep mode most of the time,standby power has an obvious influence.The low standby power consumption reduces the conversion efficiency of on-chip power supply,which makes on-chip power supply become a significant source of standby power.Therefore,effectively reducing the power consumption of the on-chip power supply becomes the key to the low-power design of the microcontroller.The voltage stacking scheme is a system power supply strategy with efficient energy transfer,it stacks multiple modules in the series path for power saving.However,the existing voltage stacking schemes can’t shut down the on-chip power supply completely and is only available for the same circuits,which limit its application in So C design.This thesis proposed an adaptive voltage stacking scheme,which shuts down the on-chip power supply and stacks Static Random-Access Memory(SRAM),digital logic,the clock unit in standby mode.With adaptive voltage adjustment under the voltage clamping of protection circuits,this scheme can get a lower balance current and significantly reduces the standby power consumption without any module function failure.Compared with the conventional scheme,the proposed method achieves 43.2%reduction of standby power with protection circuits enabled and 43.4% reduction of standby power with protection circuits disabled at 3V,TT,25℃.Compared with the other voltage stacking schemes,standby power has been decreased by 38.4% and 37.7%.Based on the TSMC 40 nm process,this thesis designs a lower standby power MCU with the adaptive voltage stacking scheme.The post-simulation results show that,the standby power is reduced by 43.4%compared with the conventional scheme at 3V,TT,25℃.Compared with On Semiconductor RSL10 and Ambiq apollo which ranked first and second in ULP-Benchmark,the proposed scheme achieves 8.5% and75.4% reduction in the standby power.Taking the ULPMark score as a comprehensive measurement standard,compared with the conventional flat scheme,the score of the proposed schemes increased by 43.4%.Compared with RSL10 and Apollo,the proposed scheme,reaching the highest score of 1390,achieves 39%and 274% improvement of score.