| A method for automatically generating the architecture for embedded multicomputer systems is presented. These are dedicated systems executing a single application over multiple Processing Elements (PEs), which communicate over multiple Communications Elements (CEs). The architecture specification for such systems consists of the task allocation and hardware specification, which in turn includes the processing capacity, local memory size, and I/O capacity of the PEs along with the bandwidth and fanout capacity of the CEs. Two common approaches to generating a complete architecture specification involve solving the subproblems of task allocation and hardware specification, or that of processor and communications synthesis. Much research has focused on solving one of the subproblems, relying on the system designer to provide an initial specification that defines the dimensions of the other subproblem. This is often performed in an ad hoc manner which may prematurely and un-necessarily limit the design space, resulting in expensive redesigns due to suboptimal or infeasible solutions. ArchGen is an implementation of a completely automated approach to the entire architecture specification process, thereby eliminating the need for an ad hoc partial specification. One application of ArchGen is in the area of embedded system design space exploration by providing the system designer with estimates of the cost and feasibility of different system configurations. Instead of expanding resources on inferior or even infeasible designs, the system designer may use ArchGen to focus on the most fruitful regions of the design space. Given a design metric, an application and hardware component set, ArchGen first selects the best task allocation and hardware specification policies to use for the specified input based on a system of regression equations, then iterates between task allocation and hardware specification to incrementally generate the architecture specification. Fast bin-packing heuristics are used to perform task-allocation, which is an np-complete problem. Compared with two other algorithms, one based on an existing single-bus architecture specification tool, the other based on simulated annealing methods, ArchGen solutions cost on average 1.03 to 26 times less with an average runtime that is 1–3 orders of magnitude less. |
