| Polycrystalline silicon (poly-Si) thin film transistors (TFTs) are currently attracting a great deal of attention for use as pixel switching elements and as driving elements in active matrix liquid crystal displays. For these applications, high quality poly-Si films on glass substrates associated with low thermal budget are necessary for fabricating high performance and long-term reliable poly-Si TFTs. We report herein on a comprehensive study of material qualities of poly-Si produced by low temperature (400--600°C solid-phase crystallization (SPC) and metal-induced SPC (MISPC). We subsequently fabricate n-channel TFTs on the SPC and MISPC crystallized poly-Si and study their properties. In contrast to TFTs made on SPC and MISPC crystallized poly-Si, we also explore the performance and hot carrier stress (HCS) reliability of n-channel and p-channel TFTs made on low-pressure chemical-vapor-deposited poly-Si. The parameter space investigated in the studies reported in this thesis includes a-Si:H deposition conditions, substrate type, glass substrate coating, glass substrate treatment, metal type, and metal/coating film thickness. Mechanisms for SPC and MISPC kinetics are proposed and variations in TFT's leakage current, threshold voltage, subthreshold swing as well as response to HCS are interpreted in terms of models incorporating generation/population of traps in the poly-Si channel, bulk gate-oxide, or poly-Si/gate-oxide interface coupled with field-emission of carriers from these traps. |
