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Algorithms for system synthesis (Clock selection)

Posted on:2001-07-28Degree:Ph.DType:Thesis
University:University of California, IrvineCandidate:Chang, En-ShouFull Text:PDF
GTID:2468390014459108Subject:Computer Science
Abstract/Summary:
Due to the advance of VLSI fabrication, the demand of designing System-On-Chip (SOC) have promoted the CAD research interest from behavioral synthesis to system synthesis. While the time-to-market requirement is cut short than ever, the design complexity is ironically growing to a new dimension. To develop a feasible approach to synthesized ultra-complex SOC designs and meet the production time-line, the call for new design methodologies is urgent. One of the main solutions for solving the design problem is extending the level consider can be reduced by an order of magnitude and thus allow the design and manufacturing of complex designs in short periods of time.; This dissertation first presents a design methodology as how the ultra-complex system can be synthesized within the shortened time-to-market request. The system synthesis starts from a high-level specification. The specification specifies the functionality as well as the performance, power, cost, and other constraints of the intended design but no implementation details. The specification is captured by description in an executable formal specification language or by the use of interactive graphical entry tool. During the synthesis process, the designer goes through a series of well-defined design steps which eventually map the functionality of the system description to the target architecture. Both input and output of each design step are descriptions in SpecC. All of the descriptions can be executed along with the SpecC simulation engine for validation.; After that, this dissertation presents various algorithms needed for two of the major synthesis steps, namely, system-level scheduling and hardware synthesis. For system-level scheduling, a novel scheduling model which can accommodate all the system scheduling characteristics along with methods and algorithms for both static approach and dynamic approach are proposed. For hardware synthesis, enhanced High-Level Synthesis models and algorithms for both synthesizing more complex behaviors and interactive behavioral synthesis are proposed. Experiments were performed to demonstrate the feasibility of the methodology and the efficiency of the algorithms, and the results are also presented in this dissertation.
Keywords/Search Tags:System, Synthesis, Algorithms
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