The indium arsenide/indium antimonide-based and gallium arsenide/aluminum gallium arsenide-based heterostructure field-effect transistors grown on hetero-substrates

Heterostructure field-effect transistors (HFET) are widely employed in microwave communications and high-speed digital technologies. To date, InAs-channel InAs/AlSb HFETs have been found to be the fastest transistors because of the superior electron transport properties of an InAs/AlSb quantum well. However, large output conductance and high gate leakage severely hampered the development of such devices. In this thesis, we present the results of our pioneering work on the depletion-mode and Enhancement-mdoe InAs/AlSb HFETs grown on S.I. InP substrate with an improved output performance and reduced gate leakage.; AlSb/InAs inverted-HFETs (i-HFET) are realized by using a thin Si δ-doped InAs layer within the lower barrier as an electron supply. Results indicate an alternative n-type doping approach in InAs/AlSb HFETs. A kink-free output conductance is obtained as well. It is confirmed experimentally and theoretically that the good output performance is related to the suppression of impact ionization in the novel InAs i-HFETs.; InAs/AlSb epitaxy design employing Beryllium (Be) acceptor and InAs cap layer realizes the high performance n-channel E-mode HFETs in an InAs/AlSb heterostructure. Zero threshold voltage is measured and an adjustment of threshold voltage can be achieved by modifying the Be doping density. The results also exhibit transconductance of 425 mS/mm and an extremely low output conductance of 12 mS/mm.; Insulating gate InAs/AlSb HFETs by Electron Cyclotron Resonant (ECR) oxidization were fabricated for the first time. Gate leakage current is successfully reduced by 3 orders, and gate-drain breakdown is enhanced up to 10 V, which are the record high in AlSb/InAs HFETs.; Semiconductor epitaxial technologies on heterogenic substrates have been of great interest in the research and manufacturing industry. GaAs/AlGaAs HFETs grown on SOI is reported for the first time. The epi-layer behavior was evaluated through Hall measurements and HFET DC and RF characterization. The comparable results to the GaAs HFETs on GaAs substrate were observed, indicating the utilization of SOI substrate is indeed beneficial to the improvement of the quality of the hetero-epitaxial layer by reducing the density of dislocations due to the function of the thin Si compliant layer.