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Modeling and performance evaluation of broadband switch architectures

Posted on:2003-07-05Degree:Ph.DType:Thesis
University:George Mason UniversityCandidate:Lu, XiaominFull Text:PDF
GTID:2468390011981202Subject:Engineering
Abstract/Summary:
The ever-increasing pervasiveness of the Internet and multimedia communications continues to drive intensive research and development on high performance broadband networks. An essential component of a broadband network is the switching node, which is responsible for transferring traffic from its input ports to its output ports. The main challenges in the design of high performance switch architectures involve satisfying conflicting requirements such as low latency, high throughput, scalability, reliability, and quality-of-service (QoS). This thesis focuses on the modeling and performance evaluation of a class of broadband switching architectures within a unified framework of the Next Generation Internet (NGI). The main contributions of this thesis are: (1) We propose a feedback controlled multihop scalable packet switch architecture to provide quality-of-service. Fluid-flow based simulations are carried out to investigate the performance. We also derive a stochastic fluid model for feedback controlled multiplexers based on Poisson Counter driven Stochastic Differential Equations (SDE-PC). (2) We develop a new performance model for a novel QoS-capable switching architecture for high-speed routers based on pipelined circuit-switching (PCS) on a general k-ary n-cube topology. Our analytical results provide important insights into the performance characteristics of the architecture. (3) We develop an analytical model for a new class of optical burst switching architectures capable of providing QoS in the optical domain. We obtain accurate models of contention resolution when wavelength conversion and fiber delay lines are used. Our model is an improvement over all existing ones on this subject.; In Chapter 2, we propose a multihop packet switch architecture based on off-the-shelf small scale switches. We introduce a simple internal rate-based based flow control mechanism to provide minimum guaranteed rates. We also develop fluid-flow based simulation models at high network traffic rates to validate the system performance. The simulation model reveals the relationship between the minimum guaranteed rate and the system delay performance.; In Chapter 3, we investigate the performance model of a multihop switch architecture employing pipelined circuit switching (PCS). We obtain a Markovian model of the system latency of the generic k-ary n-cube topology. Based on this model, we study the impact of system parameters, e.g., the number of virtual channel, the speedup factor, system dimensions, etc., on the performance. We also obtain closed-form asymptotic results in the regime where the number of virtual channels approaches infinity.; In Chapter 4, we study the performance of an optical burst switch architecture that will likely play a key role in the core network of the NGI. We analyze the contention resolution phenomenon when wavelength conversions and optical buffering are employed. We establish an accurate Markovian model to predict the system performance in terms of burst loss probability. We precisely capture the unique properties of optical buffers in the form of fiber delay lines (FDL). Our model is more accurate than over existing models dealing with the impact of FDLs on the performance of optical burst switch architectures.
Keywords/Search Tags:Performance, Model, Switch architecture, Broadband, Optical burst
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