Adaptation multicoeur d'un noyau de partitionnement robuste vers l'architecture PowerPC

Increasing use of the integrated modular avionics (IMA) architecture has helped reduce the size, weight and power consumption of avionics systems by consolidating multiple software functions on a same processor. At the same time as the accelerated adoption rate of IMA architectures, multi-core microprocessors have gained popularity due to stagnating performances of single-core offerings. Multi-core processors promise to increase software functions integration, but they are still not widely accepted in avionics, for reasons of complexity which affect safety.;The technological underpinning of the IMA architecture is the robust partitioning kernel. A robust partitioning kernel maintains an isolation between independant applications to prevent the propagation of faults within the system. This isolation is achieved by robust time and space partitioning. Unfortunately, there are no multicore-capable robust partitioning kernels currently available to support research in using multicore processors in IMA.;In this master's thesis, we propose to adaptat an existing robust partitioning kernel, so that it supports the deployment of partitions on several cores of a multi-core processor. To achieve this goal, we analyzed the existing XtratuM partitioning kernel and adapted it to support a multi-core robust partitioning model. We then implemented this adaptation on the Freescale MPC8641 multi-core PowerPC processor. The resulting prototype is named XtratuM-PPC. Finally, we present a case study using a multi-core execution plan on XtratuM-PPC.;During the adaptation and implementation phases, we identified a set of technical problems which affect the safety of robust partitioning kernels on multi-core processors. These problems highlight the implementation complexity of implementation of multi-core robust partitioning kernels.;Our work allows us to conclude that it is indeed possible to adapt a robust partitioning kernel from a single-core to a multi-core architecture. However, the safety-related problems that appeared due to the use of multi-core processors remain unresolved. Our multi-core robust partitioning kernel prototype is thus a starting point for the resolution of these problems in a real-world environment.;Keywords: Partitionning, multicore processors, operating systems, embedded systems, avionics, IMA...