Exploring CadenceRTM EDA tools for VLSI design

Massive growth in the microelectronics industry over the past decade has placed great importance on the VLSI design education of integrated circuit designers. There is a great need for new electrical and computer engineering graduates who have experience with industrial-standard VLSI design tools. Michigan State University currently uses a tool suite that is not well known throughout the industry. The purpose of this thesis is to demonstrate and document an approach for cell-based VLSI design using Cadence® EDA tools in conjunction with a standard cell library. The thesis can be transformed into a technical document with which students and faculty can gain experience with a recognized tool suite. This experience will make Michigan State University students more marketable and aid faculty research by providing a documented approach to manufacturing ASICs using industrial-standard EDA tools.