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Design, implementation, and performance evaluation of a new ADSL link aggregation model

Posted on:2006-08-29Degree:Ph.DType:Thesis
University:University of MinnesotaCandidate:Edeen, Daniel JayFull Text:PDF
GTID:2458390008461956Subject:Computer Science
Abstract/Summary:
Carriers throughout the world have deployed ADSL (Asymmetric Digital Subscriber Line) to tens of millions of consumers, connecting subscribers to the digital backbones of service providers and the Internet. ADSL provides up to 8 Megabits per second (Mbps) downstream and 1 Mbps upstream, insufficient for many applications. The transmission of High Definition Television (HDTV) requires nearly 20 Mbps with current compression techniques, far exceeding the capabilities of a single ADSL circuit. Some applications require less end-to-end delay than an ADSL circuit provides when interleaving is required to maximize the bit rate.; Numerous link aggregation models have been developed to combine multiple transmission channels into a single, high-speed connection. Some of these models will operate with ADSL, but require constraints on link rates or introduce significant additional overhead. In this thesis, we propose and implement a new link aggregation model for ADSL that operates with any combination of circuit rates, supports dynamic link rate changes, and requires minimal overhead. The virtual link provides low and bounded delay and jitter to meet the requirements of real-time applications. We introduce a novel symbol-based synchronization technique that maintains framing across circuits and supports any combination of individual link rates. We also develop an efficient protocol to manage this aggregation model.; We implemented this model using standard ADSL equipment, and measured bandwidth, latency, and jitter with a variety of link rates, circuit lengths, and packet sizes. This system demonstrated nearly linear bandwidth increase, low overhead consumption, and bounded delay and jitter. Our implementation provided a data rate of 20 Mbps at 13,500 feet using four ADSL circuits, with very low latency and jitter. We also tested this model with ADSL2 and ADSL2+ transceivers, demonstrating aggregate data rates of 35 Mbps with two circuits and up to 70 Mbps with four circuits.
Keywords/Search Tags:ADSL, Link, Model, Mbps, Rates, Circuit
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