Acceleration d'une plateforme d'encodage MPEG-4 a l'aide de processeurs configurables

Modern embedded systems and systems on chip have known an impressive growth in the last few years. Traditional tools and design techniques are becoming insufficient to meet the constraints of the market in regard to costs, processing power and design time. To answer these new challenges, the field of systems on chip saw the appearance of several techniques or tools aimed at accelerating the development cycle and increasing the processing power while keeping the costs low and a good level of flexibility.; Configurable processors are one of these tools which appeared recently. This new class of processors, thanks to the addition of specialized instructions, aims at offering a level of performance competing with that of a general processor coupled with a coprocessor. However, these processors also have the advantage of being more flexible since they make it possible to maintain an entirely software solution. Moreover, the tools provided with these processors offer a support to the design of the specialized instructions and in certain cases even offer to determine them automatically, which makes it possible to accelerate the design time and reduces the risk of errors. One of the main contributions of this research is to show how the specialized instructions can be used to obtain important speedup and to present results obtained for an MPEG-4 encoding application.; Another aspect towards which systems on chip designers are leaning is the development of multiprocessors systems on chip. These systems aim at reaching the performance needed by distributing an application over several processors. Unfortunately, the addition of several processors complexes considerably the development of the system because of all the problems related to synchronization, data coherency, communication between various heterogeneous elements and congestion. In the hope of supporting the design of such systems, tools were developed to raise the level of abstraction when designing platforms, thus masking several of the problems related to multiprocessors platforms. For example, the SystemC library makes it possible to model a complete system, as with VHDL, but by using the C++ language. There are also high abstraction level development platforms which allow to easily connect, simulate and make the synthesis of several components of a platform and which automate a good part of the development process of a multiprocessors system on chip.; The second main contribution of this research is to use a high level development platform, named StepNP, to simulate a multiprocessors system on chip using configurable processors. We will show that such a system makes it possible to obtain very interesting performance speedups and that the computing power scales very well with the number of processors.