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Low-power interpolator for the H.264/AVC decoder

Posted on:2009-02-13Degree:M.S.E.EType:Thesis
University:The University of Texas at DallasCandidate:Pan, Chiu-WeiFull Text:PDF
GTID:2448390005451670Subject:Engineering
Abstract/Summary:
Video compression technology has become increasingly important nowadays due to a high demand for High Definition (HD) videos. There is a complex balance between video quality and the quantity of data needed to represent it. In order to transmit HD videos within existing capabilities, we need a better and more complex video compression technique. Moreover, portable devices are very popular in today's technology; playing videos on such devices can quickly use up their batteries. A video decoder is used to decompress video from an original broadcasted signal or storage media. If we want to implement a HD video decoder on a portable device without draining the battery too quickly, we need to design a low-power, but high-complexity decoder. The interpolator is one of the most power-consuming blocks inside the H.264/AVC decoder. This project presents a new architecture of the interpolator for the international standard H.264/Advanced Video Coding (AVC) decoder.
Keywords/Search Tags:Decoder, Video, Interpolator
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