Font Size: a A A

Low power real time three-dimensional rendering on an embedded SIMD processor

Posted on:2009-04-14Degree:M.ScType:Thesis
University:University of Alberta (Canada)Candidate:Mrochuk, Jeffery ScottFull Text:PDF
GTID:2448390002992922Subject:Engineering
Abstract/Summary:
Graphical rendering is implemented on a Single Instruction Multiple Data (SIMD) processor array using two styles of parallelism. The SIMD processor is evaluated as a platform for real time 3D rendering in a low power mobile environment, using the SIMD Array Processor and ARM922T™ CPU within the Atsana Semiconductor J2210 Media Processor. The first algorithm is tile based, and treats the Array Processor as an intelligent frame buffer. The second algorithm uses each processor to run a simple shader algorithm on one or more pixels. The SIMD tile algorithm shows a 10.5 times performance increase and is 8.4 times more energy efficient than the ARM on the simplest tests, but performance degrades in complex real world cases. The pixel algorithm shows a SIMD performance which exceeds 5 times the sequential algorithm and is 7.7 times more energy efficient than the ARM, but exposes memory bandwidth issues in the J2210.
Keywords/Search Tags:SIMD, Processor, Rendering, Algorithm, Real, Times
Related items