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Low-Density Parity-Check Codes for Data Storage and Memory Systems

Posted on:2011-10-14Degree:Ph.DType:Thesis
University:Carnegie Mellon UniversityCandidate:Jeon, SeungjuneFull Text:PDF
GTID:2448390002469614Subject:Engineering
Abstract/Summary:
For high density magnetic recording channels and memory systems, low-density parity-check (LDPC) codes with probabilistic decoding are replacing Reed-Solomon (RS) codes or Bose-Chaudhuri-Hocquenghem (BCH) codes with conventional algebraic decoding. The main benefit of LDPC codes over the RS and BCH codes is that LDPC codes can provide lower error probabilities than equivalent conventional codes if the conditions of magnetic recording channels or memory systems are the same. In other words, in order to achieve the same error probabilities, LDPC codes can tolerate lower signal-to-noise-ratio conditions than the conventional codes, which can imply higher densities and lower media costs. These advantages of LDPC codes are possible at the cost of the increased decoder complexity over the conventional decoding.;The main themes of this thesis are (1) to determine probabilistic input to the LDPC decoders from the channel detectors in magnetic recording channels or memory systems with low complexity and (2) to demonstrate the benefits of LDPC codes in the proposed schemes. The probabilistic inputs dealt with in this thesis can be either correlated or uncorrelated. The probabilistic inputs from magnetic recording channels (and also from Viterbi detector outputs) or from multiple-bit-per-cell memory model are correlated and the probabilistic inputs from single-bit-per-cell memory model are uncorrelated. Binary and nonbinary LDPC codes are discussed for both magnetic recording channels and memory systems.;The contributions of this thesis to the field of signal processing and error correcting methods can be summarized as follows. (1) For intersymbol-interference channels with data-dependent and correlated noise, an analytic method is developed to identify the most probable error patterns of Viterbi detector output and to estimate the probability of each error pattern. These are very important information to design, for example, post processors or sync marks for timing recovery. (2) For magnetic recording channels, it is demonstrated that LDPC codes without outer concatenated RS codes provide lower sector error rates than the concatenation of LDPC and RS codes when the user bit density is fixed, which suggests that LDPC codes should completely replace RS codes. Neither serial or parallel concatenation improves the performance. (3) For magnetic recording channels, performance and complexity of 4kB LDPC codes for recent 4kB sector format are investigated. (4) A reduced-complexity turbo equalization method is proposed and it is shown that coding gains, about 0.5 dB to 1 dB, can be obtained over the case without turbo equalization. The method uses binary soft output Viterbi detectors (SOVA) for nonbinary LDPC decoders and avoids costly exact marginalization of joint probabilities of bits in nonbinary symbols. (5) A general model for nonvolatile memory cells without probabilistic outputs, either multiple-bit-per-cell or single-bit-per-cell, is derived for any time-invariant error sources such as a constant radiation environment. It is shown that probabilistic input to LDPC decoders can be generated based on the derived model and it is also shown that binary and nonbinary LDPC codes can outperform conventional RS or BCH codes using the proposed methods.
Keywords/Search Tags:Codes, LDPC, Memory systems, Magnetic recording channels, Probabilistic, BCH, Conventional
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