Low density parity check codes for magnetic recording systems

The low density parity check (LDPC) codes based on iterative belief propagation decoding have shown near Shannon-limit error correcting performance. This thesis explores the application of LDPC codes with iterative soft decoding for use in high density magnetic recording systems. The key challenges include LDPC code evaluation on realistic magnetic recording channels, the runlength control structure for LDPC coded channels, and the error floor estimation of LDPC codes.; A realistic magnetic recording channel model is developed based on perpendicular magnetic recording systems. The impairments present in the readback signal from a hard disk drive, such as transition noise, nonlinear transition shift, and baseline wander, are included in the model. The model is implemented in FPGA hardware and an efficient LDPC system is evaluated using this channel model. We were able to investigate the system performance at low bit error rate (10-12) and frame error rate (10-9 ). Hardware simulation results show that the LDPC coded system is able to offer larger than 20 dB coding gain in the presence of these impairments in perpendicular recording channel compared to uncoded sequences.; Runlength limit constraint is needed for timing recovery in magnetic recording systems. A new ECC-RLL system design is proposed to solve the incompatibility between the conventional RLL coding and the LDPC codes. The new system structure integrates the bit-flipping algorithm with the traditional RLL code. Meanwhile, in our effort to reduce the performance loss due to the RLL constraint, we introduce an additional interleaver. The results show that even with strong runlength constraint, the performance loss is less than 0.2 dB.; The error floor, as a byproduct of the belief propagation algorithm occurs for most LDPC codes. The primary reason of error floors is identified as special graphical structures of LDPC code model, defined as trapping sets. Based on the concept of trapping sets, the error floor can be estimated for a given LDPC code. In this effort, error floor estimation methods under different channel models are compared. For LDPC codes used under partial response channel, we proposed a new semi-analytical method to estimate the error floor based on trapping sets. The estimation results are within 0.3 dB of the direct simulation results. In addition, this method enables us to estimate the FER down to 10 -14.; Keywords. Magnetic Recording, Low Density Parity Check Codes, Partial Response Channel, Perpendicular Recording, Transition Noise, Nonlinear Transition Shift, Baseline Wonder, Runlength Limited Codes, Runlength Control, LDPC Coded Channel, Belief Propagation, Iterative Decoding, Field Programmable Gate Array, Trapping Sets, Stopping Sets, Post Processing, Error Floor...