Automated Synthesis of Analog to Digital Conversion

This thesis describes circuit architectures and techniques that facilitate the automatic synthesis and fabrication of analog-to-digital converters (ADCs). Since automated synthesis already exists for digital circuits and is part of the digital circuit design flow, this work demonstrates the feasibility of ADC synthesis with little or no modification to presently existing software tools. In the end, it is demonstrated that an ADC can be implemented from synthesizable Verilog code, making it highly portable from one process technology to another. Moreover, by demonstrating how to use existing standard digital gates to generate analog functions (e.g. an analog comparator), the physical implementation of an ADC can be as automatic and straightforward as a standard digital circuit.