Electro-thermal Modeling of Semiconductor Devices and Integrated Circuits

The thesis work focuses on the electro-thermal modeling of semiconductor devices and integrated circuits, which include advanced semiconductor devices and circuits, such as silicon-on-insulator (SOI) technology, and photovoltaic device structure. Efficient thermal models are developed for different semiconductor structure, and some are implemented in a circuit simulator to perform electro-thermal simulations.;The proposed circuit model has been implemented in the BSIMSOI model to perform electro-thermal simulations of an SOI cascode current mirror circuit in Spice. Effects of layout design on electric and thermal behaviors are investigated. Self-heating effects induced by different BOX thicknesses are also examined.;In addition to the above circuit models, reduced order models (ROMs) are also used to develop thermal models in the thesis work. The first ROM based on proper orthogonal decomposition (POD) is proposed for integrated circuit structure formulated in a hierarchical function space. The proper orthogonal modes are extracted from data obtained from the detailed numerical simulation (DNS) to capture the largest temperature variance in the data, and the coefficients are determined through the weak form of the heat transfer equation. The temperature profile can be simulated using the linear combination of the selected finite number of the proper orthogonal modes and the corresponding coefficients. The application to a SOI integrated circuit block illustrates that the POD model is capable of providing the accurate detailed temperature profile with little computational effort.;Another ROM technique using singular value decomposition (SVD) is introduced to characterize photovoltaic (PV) cells. The SVD model describes the output current using linear combination of the voltage dependent basis functions and the corresponding temperature-irradiance dependent coefficients. A PV device model is constructed using the developed SVD PV model to account for temperature and sun irradiance, and the PV device model has been successfully implemented in Spice. This approach allows for electro-thermal simulation of PV modules or arrays taking into account thermal effects on PV electric characteristics at the cell level.;In Chapters 2 to 4, a physics-based thermal circuit model for SOI analog circuits is presented and verified with FEM simulation. This model integrates a non-isothermal device thermal circuit with interconnect thermal networks. The device circuit model is applied to many practical structures, such as SOI metal-oxide-semiconductor field-effect transistor (MOSFET) structures with one-device and multi-device on a single island, multi-finger SOI structure and SOI devices on separate islands. Thermal networks for interconnects derived based on a lossy line model are developed for some standard interconnect structures, such as parallel-coupled wire and perpendicular cross-coupled wire structure. Using the device circuit model and interconnect thermal networks, a thermal circuit can be constructed for analog SOI integrated circuits. It has been demonstrated that the approach is able to appropriately account for heat flow in devices and interconnects, including heat exchanges between devices and between parallel-coupled and perpendicular cross-coupled interconnects.