Power delivery for nanometer technology chips

Technology scaling has been the primary driver toward high-performance, high-complexity integrated circuits. These technological advancements have made the design of power delivery a challenging task. Dense circuitry operating at high clock speeds have increased the transient currents, while noise margins of the power supply have shrunk considerably along with the decrease of power supply levels. These trends have amplified the difficulty of designing reliable power delivery networks and additional considerations must be given to the design of power networks when power-saving techniques such as power gating are applied. Additionally, allocating decaps to suppress power supply noise can no longer be performed in an ad-hoc manner. Incorrectly positioned decaps can have a detrimental behavior, thus further consideration must be given to efficient allocation of decaps in power delivery networks for power supply noise suppression.;The purpose of this dissertation is to provide detailed analyses and optimization techniques for power delivery networks. We investigate the implications that power gating technique imposes on the power networks. We provide insight and intuition into the design of power delivery networks considering the behavior of decoupling capacitors and their effectiveness in suppressing power supply noise. The primary objectives are threefold. First, we examine the DC conditions of power networks and describe potential electromigration problems introduced by power gating. We present a design methodology for resizing power network with minimum area increase. The second objective of this thesis is to characterize the decoupling capacitors behavior and introduce analytical formulas to control their effectiveness for suppressing power supply noise. We present a power network design methodology for efficiently allocating on-chip decoupling capacitors. Finally, the third primary objective is to explore the power and signal integrity of power networks for multi-core systems. We provide a workload assignment strategy that minimizes power supply noise in multi-core systems.