Analysis Of Jitter Induced By Power Supply Noise For High-speed Digital Circuit

With the development of high-speed digital circuits to high-density,low-voltage,and high-current trends,power supply noise is becoming more and more serious.Power supply noise has a serious impact on system voltage and timing margin.Power supply noise not only directly affects the jitter of pre-output and post-drivers output signal but also causes internal timing reference and jitter of the clock distribution path,which directly reduces the timing accuracy of the signal.Currently,high-speed I/O interfaces usually require very low jitter to meet their timing budget,and power supply noise is one of the source of jitter,jitter induced by power supply noise has become one of the main bottlenecks in designing high-speed interfaces.This paper mainly studies the jitter induced by power supply noise.Under the premise of absorbing previous research results,the composition of the power distribution network,the generation mechanism of power supply noise and the influence on the output signal of the output are elaborated.The effect of the termination structure of the output driver on the system power distribution network impedance has been studied.The transmission function of power supply noise to jitter is derived in the frequency domain.Some research results have been obtained.The research results are summarized as follows: 1.The analysis and modelling of power supply noise are introduced in detail,the composition and characteristics of the power distribution network are described in detail,the generation mechanism and type of power supply noise are analyzed,the power supply noise is mainly divided into DC IR voltage drop and simultaneous switching noise,while switching noise has a significant impact on jitter and the overall system,and then,the effects of power supply noise on the output and the simulation method are introduced in detail.Based on this,the research methods of jitter induced by power supply noise are expounded in the frequency domain and the statistical domain,respectively.2.In the current high-speed link,the output driver is often terminated in order to improve the signal integrity of the high-speed link.In this paper,the pseudo-open drain termination is taken as an example to analyze the effect the termination structure and the output state on the impedance of the power distribution network,the change of the impedance will inevitably affect the amplitude of the power supply noise,and thus inevitably affect the jitter.This paper has done simulation validation and discussion.3.An analytical calculation method of transfer functions relating power supply noise to jitter based on the output buffer pseudo open drain termination is proposed,and the timing interval error sequence and transfer function caused by power rail and ground rail noise are obtained,the validation is carried out in the frequency domain.The influence of termination resistance and equivalent capacitance on the transfer function is discussed.The correctness of the transfer function calculation is validated by the comparison of simulation and calculated values.