| This study addresses encapsulated wire bonds in chip-on-board (CoB) multi chip modules, which provide a low cost option for dealing with the current trend towards compact microelectronic packages with increased I/O, higher reliability and lower cost. The focus is on thermomechanical stresses caused in the bond wires when the encapsulant is cooled from high curing temperatures and subsequently subjected to thermal cycling loading. The stresses generated in bond wires due to thermal expansion mismatches, in an encapsulated CoB are very complex and are driven by both global and local thermal expansion mismatches between: (i) glob-top encapsulant and the silicon die, (ii) encapsulant and the wire, and (iii) encapsulant and the substrate assembly.; A 2D stress analysis model based on the variational Raleigh-Ritz (RR) method is developed, to estimate thermomechanical stresses in the bond wire, based on elastic analysis. The study focuses on detailed parametric investigation of different encapsulated CoB configurations. The initial wire profile, before encapsulation, is first modeled with RR 2-D trial functions based on cubic splines. (Abstract shortened by UMI.)... |
