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The Design Of "low, Small, Slow" Target Detection Radar Signal Processor

Posted on:2020-04-20Degree:MasterType:Thesis
Country:ChinaCandidate:S J DingFull Text:PDF
GTID:2438330626453196Subject:Electromagnetic field and microwave technology
Abstract/Summary:PDF Full Text Request
With the rapid development of UAV(Unmanned Aerial Vehicle)industry,urban airspace is facing increasingly serious security threats.Cases of drones interfering with flights,taking aerial photos of sensitive areas and delivering prohibited items to prisons show that drones have become a new airspace threat.To this end,the radar is required to detect the target of “low altitude,small volume and slow speed”.Due to the characteristics of “low,small and slow” target,clutter suppression and detection of target must be considered.Low target height leads to strong background clutter;small target size leads to smaller RCS(radar cross section)and weaker echo of detected target;slow target speed results in serious aliasing of Doppler shift between target and strong ground clutter,which makes it more difficult to distinguish target from clutter in frequency domain.These factors make it more difficult for “low,small and slow” targets to be detected by radar.A signal processor based on phased array radar is designed for the difficult detection of low,small and slow targets.After recognizing the moving clutter,a low sidelobe filter is designed to suppress the strong clutter;the multi-channel static and dynamic clutter map technology and CFAR fusion technology can control false alarm rising and improve target detection ability under complex clutter background;the precision is improved by pitching dimension's sum-differential angle measurement,which makes it easier for radar to distinguish UAV from ground target;at the same time,high resolution processing in distance with long time accumulation can bring about refinement of clutter and improvement of SNR.Then an FPGA-based phased array radar's signal processor is designed.The design uses the hardware structure of FPGA+DSP,which can better undertake the design of complex timing and signal processing algorithm tasks.Then the hardware configuration method and algorithm design of the signal processor is introduced,at the same time the test content and test method of signal processor under phased array platform are given.Finally,the performance of the signal processor is verified by the measured results of the whole radar.A lot of tests prove that the radar has all-right detection performance for the drone.It can effectively detect drones in various attitudes of drone and complex urban environments,which verifies the performance of signal processor.It shows that the design has a good application prospect and practicability.
Keywords/Search Tags:"low,small,slow", phased array, clutter suppression, signal processing
PDF Full Text Request
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