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Design And Implementation Of A Reconfigurable Digital Signal Processing System Based On Multi-core DSP

Posted on:2020-12-16Degree:MasterType:Thesis
Country:ChinaCandidate:S Z HeFull Text:PDF
GTID:2438330572487374Subject:Control engineering
Abstract/Summary:PDF Full Text Request
In recent years,under the guidance of information technology,microelectronics and other technologies,the new generation of avionics systems is developing towards informationization and data integration.The types of data and data to be processed on the avionics system continue to increase,which puts higher and higher requirements on the function and performance of the data signal processing unit.The universal parallel data signal processing platform with high real-time performance,strong processing capability,high communication rate and reconfigurability has become the mainstream development direction.Based on the analysis of the application requirements of the integrated avionics digital signal processing platform,combined with the parallel digital signal processing capability of multi-core DSP and SYS/BIOS multi-threading software technology,this dissertation realizes a parallel processing and high-speed communication algorithm for multi-channel data.A dynamically updated integrated digital signal processing unit.The dissertation completed the design of multi-core local reconstruction scheme,system internal and external communication,multi-core multi-threaded overall software framework design and functional verification.The main contents are as follows:Firstly,the hardware architecture of multi-core DSP and the data flow mechanism in the system are studied.Through the analysis of multi-core parallel mode,the multi-core is functionally divided based on the master-slave model,and the overall software and hardware framework of the system is determined.Secondly,the thread and task scheduling mechanism of SYS/BIOS real-time operating system are expounded,and key technologies such as inter-core synchronization and communication,inter-task synchronization and communication,and interrupt management in multi-core and multi-tasking environments are studied.It laid the foundation for the design of the system multi-core multi-tasking software framework.Thirdly,the implementation mechanism of two high-speed communication interfaces of SRIO and Gigabit Ethernet on DSP is studied.The software of two communication interfaces of SRIO and Gigabit Ethernet is carried out through TI PDK software development kit and NDK network development component respectively.Design.Fourthly,through the research on the multi-core DSP startup mechanism,the local reconstruction technology scheme that can realize the dynamic update of software on multi-core is designed.Finally,the system multi-core multi-task overall software framework is designed.Fifthly,the two high-speed communication interfaces of system SRIO and Gigabit Ethernet were tested,and the overall software framework of the experimental scheme system was designed and verified.This dissertation innovatively applies reconfigurable ideas to multi-core DSP platforms.Based on multi-core DSP and SYS/BIOS real-time operating system,it realizes integrated digital signal processing integrating high-speed communication,multi-data parallel processing and algorithm dynamic update.unit.The system has high real-time and versatility,which satisfies the development needs of system integration and generalization.
Keywords/Search Tags:Multi-core DSP, SYS/BIOS, Parallel processing, Local reconstruction, High-speedcommunication
PDF Full Text Request
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