| In the field of aerospace, due to the continuous progress of camera technology, various types of data are becoming more huge while there are more requirements for the data processing platform performance. Owing to constrains of various aspects such as production process, production structure and power consumption, the single-core processer is not able to improve its performance solely relying on promoting frequency. And multi-core processor which takes advantage of the kernel number to make up for inadequate performance is gradually leading the mainstream of high-performance processor. However, when the number of kernels beyond a certain amount, it’s difficult to write parallel programs regardless of the degree of parallelism or memory scheduling, therefore, whether the procedure can be parallel is the key point of multi-core processor development.Aiming at the above problems, this paper mainly studies on how to implement a high degree of parallelism of the parallel arithmetic of image processing algorithm program using multi-core platform under the premise of ensuring universal, and has built a parallel processing system to complete a specific demand for decompression algorithms- JPEG2000 and JPEG-LS. The parallel processing system implemented in this paper mainly consists of three modules: communication module, memory management module and storage module. The system communicates through gigabit fiber nerwork and 8 channel PCIE. In the memory management module, the system manages the memory scheduling effectively by setting different chain tables and locking mechanism. In the storage module, the solid state disk is adopted for data reading and writing. Following designs is made to insure high degree of parallelism:(1) The data processing is dealt with multithreading. The system distributes the decoding threads to different kernels,and each kernel can write the recovered image to the local hard disk after decoding the data independently.This design results in quick communication.(2) The data distribution is dealt with chain table.The system maintains several chain tables which record the information of bitstream and reconstructed images, the kernels decode bitstream got from chain tables and give the reconstructed images back to chain tables. This design is able to make sure that each kernel can work uninterrupted and more effciently.(3) The communication protocol designed for special demand is applied. Aimming at the characteristic of the system, the datapackage with informations is sent to the reciever before an effective transmission. This design can fully take advantage of the hardware resources and improve the communication rate.(4) The data is maintained with two-level cache. The system classified the memory into two levels. The fisrt level receives the data uninterrupted and disconnects different frames into level two. This design can make sure of the continuous reception of data and meet the needs of this system.The parallel processing system which can reach 90% of the full multiple designed in this paper is proved to be reliable and stable through a long period of performance tests. This system is able to handle large amounts of real-time data under the premise of high degree of parallelism. Meanwhile, it has good versatility for different programs, that is, different programs can be transplanted in this system and it can implement parallelism after appropriate modifications. In summary, the present system is of high practicality for multi-core parallel programs. |
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