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Design And Implementation Of Database Acceleration Platform Based On FPGA

Posted on:2021-05-05Degree:MasterType:Thesis
Country:ChinaCandidate:Y Q SunFull Text:PDF
GTID:2428330647957206Subject:Computer system architecture
Abstract/Summary:PDF Full Text Request
Nowadays,in the context of localization and self-controllability,the performance improvement of domestic databases based on domestic hardware environments will be one of the key research directions in the future.Aiming at the reality of poor performance of domestic operating systems and domestic independent CPU chips,this paper aims to design a domestic database operation acceleration platform based on FPGA,making full use of the logical operation and parallel computing capabilities of domestic FPGAs,and the domestic CPU is responsible for domestic gold storage The scheduling and management of the database transfers the data calculation and processing work to the FPGA parallel logic unit.The heterogeneous accelerated computing architecture combination of "CPU+FPGA" is used to make up for the shortcomings of the lack of domestic hardware performance.In order to make database developers make better use of this acceleration platform,this article first designs a system acceleration function supervision interface.This interface should be able to show the processing progress of the acceleration task,the state of the acceleration platform,and the acceleration effect.Then,this paper makes a specific design of the domestic database acceleration platform.The platform is divided into three levels:user layer,kernel layer,and hardware layer.The user layer is the above-mentioned system acceleration function supervision interface,the kernel layer is mainly a bus protocol,the hardware layer is divided into three specific functional modules.The research focus of this paper is to implement the acceleration algorithm function of the hardware layer,specifically to implement the hardware algorithm,and optimize the debugging according to the simulation results.Then load the adjusted algorithm into the FPGA test board,use the WinDriver driver software to load the simulation data into the FPGA test card,and accelerate the sequencing of the simulation data to achieve the basic functions of the acceleration platform,and calculate the acceleration platform based on the results of the simulation experiments effect.
Keywords/Search Tags:Domestic self-controllable, domestic gold warehouse database, database acceleration, domestic FPGA
PDF Full Text Request
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