Research And Implementation Of Local Speech Recognition Based On FPGA

As an important branch of artificial intelligence,speech recognition has attracted much attention on many fields such as communication and industry.Currently,speech recognition equipment widely uses the method of voice chip integration,but most equipment must be used on the Internet,which limits the equipment usage site.Research based on local speech recognition chips has gradually received attention.In the design of speech recognition chips,FPGA is favored by designers for their powerful performance,rich hardware resources and field programmable advantages.However,most of the current research focuses on how to use FPGA to accelerate deep learning algorithms,or implement deep learning algorithms,and there is not much research on the overall implementation of local speech recognition.In response to this problem,this topic studies the implementation of local speech recognition on FPGA.The convolutional neural network algorithm based on the global average pooling layer is used,and an algorithm to simplify the Softmax layer is proposed to reduce the resource consumption of the FPGA while ensuring the recognition effect.Using pipeline and parallel processing to speed up speech recognition.The research work of this subject mainly includes the following aspects.First,study the development status and latest achievements of artificial intelligence speech recognition technology at home and abroad.After analyzing the deficiencies in most existing speech recognition devices,a design schemes that uses FPGA to implement speech recognition preprocessing,feature extraction,and pattern matching to solve related problems in offline speech recognition chips is proposed.Second,use FPGA to achieve the hardware construction of local speech recognition system.The system includes power module,FPGA core module,INA217 amplifier module,AD73311 digital-to-analog conversion module,AT24C02 storage module,RS232 interface and JTAG interface module.Third,the construction of the convolutional neural network model and the comparison of recognition rate.Three neural network models were built in this subject,one is a traditional convolutional neural network,one is a convolutional neural network based on global average pooling,and one is a convolutional neural network based on global average pooling after the Softmax layer algorithm is simplified.Comparing the recognition rates of the three models,the data shows that the three algorithms have a small difference in recognition rate.Fourth,the Vivado integrated development environment is used for RTL-level code designs,which implements speech recognition preprocessing,feature extraction,and pattern matching.Combining peripheral module communication protocol with AMBA bus protocol.A pipeline and parallel processing method are proposed to speed up the calculation speed,and a row operation method is used to perform real-time processing in the convolution process.Comparing the FPGA resource usage of three convolutional neural network algorithms,the data shows that the algorithm proposed in this paper can greatly reduce the amount of FPGA resources and speed up speech recognition.Finally,build an UVM verification environment under Modelsim to simulate AMBA?UART,AMBA?IIC,AMBA?SPI,single convolution kernel and single global average pooling module individually.The overall system was tested,and the results showed that the system achieved a recognition accuracy rate of more than 80%.This topic uses FPGA to complete the local speech recognition system,which has the characteristics of fast,offline,and less resource consumption.It has certain reference value for the design of local speech recognition chips.