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Research And Design Of Low Noise And High Power Supply Rejection Ratio Ldo

Posted on:2021-04-15Degree:MasterType:Thesis
Country:ChinaCandidate:Y H ChenFull Text:PDF
GTID:2428330626956082Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
With the increasing development of semiconductor technology,the requirements of system on chip(SOC)on power management circuits are also increasing.After each module is integrated on the same chip,cross-coupling between signals and power ripple noise on circuits The performance of the device will have a great impact,so a low-dropout regulator(LDO)capable of providing a clean power supply voltage is usually required to supply power.Detailed analysis and careful design.This article analyzes the loop structure of the LDO,and adopts Miller compensation and Q value attenuation to compensate the loop frequency,so that the loop stability is better without load;by generating noise on the LDO The factors are analyzed in detail,and the LDO is designed with low noise without increasing the complexity of the circuit.By analyzing the power supply ripple suppression capability,this article identifies two ways to improve the power supply rejection ratio of the LDO:In the low frequency band,you can get a better PSR by increasing the loop gain.In the middle and high frequency bands,you have designed a PSR enhancement circuit based on feedforward ripple cancellation technology to optimize the power supply rejection ratio of the LDO.To ensure the performance of the LDO,this article has designed a reference level generation circuit with high power supply rejection ratio,low noise,and low temperature coefficient for the LDO circuit to provide bias voltage for the LDO.In order to ensure the power supply safety of the entire circuit,this article has designed Current protection circuit;Finally,the layout design and simulation verification of the LDO are carried out,and the simulation results are analyzed.Based on the 130 nm CMOS process,this paper designs a low-dropout linear voltage regulator circuit with an input voltage of 1.2V and an output voltage of 0.9V and a load current range of 10?A ~ 10 mA.The circuit has been verified by simulation and analysis of the results.The simulation results show that under different load conditions,the phase margin is maintained above 60 degrees,the loop stability is good,the load regulation and linear regulation are good,and the power supply is high.Rejection ratio.At low frequencies,the power supply rejection ratio is better than-70 dB,and at 1MHz is better than-30 dB.The noise performance is good,and the equivalent output noise in the full band is only 102.37?V.
Keywords/Search Tags:High PSR, Low noise, Q-reduction, Power management, Capless
PDF Full Text Request
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