Research On Face Detection In Low Light Based On FPGA

At present,face detection technology based on artificial intelligence has been rapidly developed and applied in face detection,public security capture and edge computing.While the face detection technology based on convolutional neural network is widely used,the face detection challenge in night and other low-light scenes also emerges.At present,the face detection technology is mainly realized by software in computer and other plat-forms.With the advent of 5G era,more face detection products will develop towards miniaturization and low cost,which poses certain challenges to the existing software-based face detection technology.Aiming at this problem,this paper mainly studies the hardware design and implementation of face detection technology under low light.Firstly,this paper expounds the technical background of face detection,analyzes the research status of face detection at home and abroad,and discusses different face detec-tion algorithms and their research on different hardware.Based on the detection problem of low light,this paper studies the face detection technology based on FPGA under low light,and introduces the basic principle of image enhancement algorithm and MTCNN algorithm.In this paper,the hardware design of face detection technology under low light is mainly studied in the following aspects:1.Hardware design of neural network in MTCNN.This part is divided into extract-ing face features and calculating face target frame bias.In the design,the convolution operation mode of BRAM block collocation and the convolution kernel size can be arbi-trarily configured is adopted to reduce the number of times of the convolution kernel data extraction,and the data block of 6*6 can be output in one time,and the calculation mode of full connection that is suitable for both cases is adopted.2.Image Resize and bounding box hardware design in MTCNN.This part is used to construct the output of image pyramid and face target box of different size.In the image Resize,BRAM data is divided into even and even,even and odd,odd and even,odd and odd storage methods to speed up the design of data extraction speed of the module.The bounding box uses the two-layer BRAM block approach to constitute the parallel processing architecture.3.Image enhancement hardware design.This part is to enhance the brightness of the face image under low light.In order to speed up the processing speed of architecture and reduce the power consumption of data extraction,the convolution operation of BRAM block and s-type window sliding is adopted.And in the division operation part of the multi-bit data,the method of division calculation array is used to speed up the processing.In this paper,Caffe and Matlab are used as the algorithm testing platform,and the hardware design and implementation are completed on Vivado and virtex-7 FPGA.The FPGA based low-light face detection hardware can accurately detect the face position under low light,the detection score reaches 99%,and basically achieves the performance of real-time requirement(26 frames/s).At the same time,the error of coordinate and score is no more than 2.7% and 0.49%.This design lays a foundation for the realization of miniaturized,real-time and low-cost low-light face detection hardware.