MIPI SoundWire Interface IP Design Based On Audio Codec Chip

The commonly used digital interface protocols for audio transmission are I2 S and HD-A.I2 S protocol is simple and flexible,and can configure different interface transaction channels by the requirement,mainly used in consumer electronics products;HD-A bandwidth is high,mainly used in PC and other electronic products.With the demand of audio transmission in the development of modern consumer products,the shortcomings of I2 S and HD-A are becoming more and more obvious ly.SoundWire is the next generation audio transmission interface specification which is proposed for replacing I2 S and HD-A.The SoundWire Audio Interface Protocol is led by the MIPI Alliance,including Intel,Qualcomm,Apple and more than 25 audio technology ecosystem companies worldwide have been involved in the development of SoundWire.SoundWire uses a dual-edge multi-node topology,which contains clock and data interface signals.Control information and audio data transmission are accomplished by two signals of clock and data.The traditional parallel data transmission interface is upgraded to serial data transmission,which greatly reduces the cost of application system and system power consumption.The goal of this design is to design and implement an IP that meets the SoundWire specification by studying and analyzing the latest SoundWire specification,and to deliver a complete IP that can be reused,including the design documentation for IP,the RTL code for IP,the simulation and verification environment for IP,as well as the integration and physical implementation reference for IP.Through the design and implementation of this IP,we can further master the IP development flow and support the integration of IP in the chip implementaion.This thesis describes the development background and technical features of SoundWire according to the design goals,puts forward the functions and performance indicators of IP according to the practical application requirements,and designs an IP micro-architecture based on the SoundWire protocol specification according to the functions and performance,aiming at fast frame search and IO PAD as the key technologies to analyze.On this basis,the key modules of IP in RTL code implementation are described.This thesis also presents the verification test method of IP,describes the simulation ver ification environment of IP and the prototype test environment of FPGA,and illustrates the application of IP in the actual system.In addition,this thesis presents the flow for software programe the SoundWire IP.By describing the registers,analyzing the operation flow and calculating the related parameters,it provides software programe flow such as initializing SoundWire bus in different modes,modifying the shape of transmission frame,configuring SoundWire Master-Slave devices and switching transmission modes.The IP is implemented according this thesis has been verified by complete simulation eviroment,and has been tested by the FP GA and verified by the silicon chip.The function and performance meet the expectation.This interface IP has the advantages of small area,low power consumption,high bandwidth and flexiable configurability,and has a very broad application prospects in the consumer field.