Research On Task Scheduling And Control Technology Of Multi-core Cryptographic SoC

Cryptographic algorithms have penetrated into all aspects of human life and provide functions such as data encryption,message authentication,authentication,and key management.They are an important part of current network and information security.In many cryptographic algorithm implementation methods,multi-core cryptographic So C(System on Chip)is more and more widely used in security chips because of its flexibility and high performance,but its performance is shared by storage,communication,and computing.Decided that the unreasonable allocation of core cache,insufficient communication speed,and unbalanced task scheduling may all lead to a decrease in So C performance.Therefore,this article aims at the high-speed processing of cryptographic tasks in multi-core cryptographic So C.Based on the analysis of multi-core cryptographic So C structure and cryptographic task characteristics,it focuses on three aspects: dynamic allocation of cache,high-performance DMA transmission,and cryptographic task scheduling algorithm.The factors and solutions that limit the high-speed processing of cryptographic tasks in multi-core cryptographic So Cs are as follows:1.A dynamic virtual channel controller based on linked list structure on FIFO granularity is proposed.Aiming at the problems of data flow blocking and password task processing performance degradation caused by unreasonable cache allocation,a dynamic virtual channel controller based on a linked list structure is proposed based on the model of cache allocation management,which is maintained by input and output controllers.The correctness of the linked list information register,which allocates cache resources according to the different storage requirements of each single core,completes the transparent and unified management of cache resources,and its variable number of virtual channels and channel depth reduces data flow blocking and reduces tasks Allocation delay and task scheduling limits greatly improve the utilization of cache resources.Under the same buffer capacity,the virtual channel controller can increase the maximum number of channels and the channel depth by 4 times.At the same time,in order to analyze the impact of different design parameters on the performance of the dynamic virtual channel controller,the dynamic virtual channel and static cache allocation are compared and analyzed under different data input speeds,task types,and data input granularity.2.A multi-channel DMA controller supporting full-duplex data transmission is proposed.Aiming at the problem of insufficient communication speed in multi-core cryptographic So C,which may cause the performance degradation of cryptographic So C,on the basis of establishing a DMA transmission speed model,a multi-channel DMA controller supporting full-duplex data transmission is proposed.The design uses a dedicated interface and bus Realize parallel reading and writing of specific modules,and at the same time add a cyclic transmission mode for DMA transmission according to the periodic characteristics of cryptographic tasks,improve DMA transmission efficiency and bandwidth utilization by reducing CPU control work,and design the priority of each channel of DMA Request adaptively changing priority arbitration circuit,which further reduces the CPU control workload and improves the bus bandwidth utilization and transmission speed.It can be seen from the experiment that the DMA design in this paper increases the average value of coprocessor utilization from 25% to 54%.Finally,it compares with the previous design in terms of hardware design,working mode,arbitration strategy,and system performance improvement.3.A dynamic table scheduling algorithm for cryptographic task flow is proposed.Aiming at the problems of slow scheduling of cryptographic tasks and low resource utilization in multi-core cryptographic coprocessors,the parallelism,dependence,randomness characteristics of cryptographic tasks and the real-time requirements of task scheduling are analyzed,and a deadline constraint is established.And dependent constraint-based cryptographic task scheduling model,on this basis,a dynamic scheduling algorithm based on task insertion is proposed to make full use of the historical information of the task to allocate undependent tasks to a single core that may have idle conditions.The core utilization rate further improves the performance of the cryptographic So C.At the end of this paper,the algorithm and the EDF algorithm are compared and analyzed in terms of task scheduling success rate and execution time on the cryptographic task scheduling simulation platform.At the same time,the effects of task volume,task type,and number of cores on the performance of the algorithm are discussed.Based on the characteristics of cryptographic tasks and the structural characteristics of multi-core cryptographic So C platform,this paper designs a dynamic virtual channel controller,multi-channel DMA controller and dynamic table scheduling algorithm for multi-core cryptographic So C.The experimental results show the feasibility and effectiveness of the above-mentioned scheduling control structure and algorithm,which can better solve the problems of cache management,fast communication,and task scheduling encountered in current multi-core cryptographic So C,and realize the performance of cryptographic task processing in multi-core cryptographic So C Promotion.