Research On Energy Optimization For Multiprocessor SoC With Task Scheduling And Cache Partitioning

The increasing complexity and performance requirements of electronic systems have led to the widely use of multiprocessor architecture.With the development of the semiconductor process,high power consumption of modern multiprocessors becomes a major concern for system designers.In a multiprocessor System-on-Chip,the processors and memories consume a large part of the total energy.So system designers should pay special attention to the energy consumption of the two sources above.In a hard real-time system,the execution time of a task is usually uncertain due to the variations of software and hardware.Traditional scheduling techniques usually consider the worst case execution time of a task,which will result in a sub-optimal scheduling.In order to further decrease the energy consumption of the processors,a new scheduling technique considering the uncertainty of the execution time of the tasks is in desperate need.Multicore architectures are typically equipped with a small private L1 cache for each core and a large shared L2 cache.These cache memories not only make up a large portion of the total area but also consume a large fraction of the total energy of a chip.When multiple tasks are running in a shared cache,they have interference with each other,which increases the energy consumption of the cache system.Cache partitioning is an effective way to tackle this problem,and it assigns portions of the shared cache to processors or tasks.The miss rate of the shared cache is essential for cache partitioning.If the miss rate of the shared cache can be estimated early in the design stage,it would be beneficial for system designers to partition the shared cache and decrease the energy consumption of the cache system.This thesis consists of the following two parts:1)Scheduling of the tasks with uncertain execution time,and energy optimization of multiprocessor.Dynamic Voltage Frequency Scaling(DVFS)and Dynamic Power Management(DPM)are preferable techniques to optimize energy consumption.However,previous DVFS and DPM algorithms were mostly designed for inter-task scheduling,without sufficient exploration on intra-task scheduling for further energy reduction.This thesis presents a new intra-task scheduling approach considering the probabilistic distribution of task execution time,and it optimizes the mathematical expectation of power consumption(expected power consumption)for periodic dependent tasks with uncertain execution time running on MPSoCs using DVFS and DPM.The energy-efficient scheduling problem can be formulated by means of mixed integer linear programming(MILP)with the proposed technique.Moreover,a technique is proposed to compress the exploration space by reorganizing the probabilistic profiling information of all tasks.Our experimental results on synthetic and realistic benchmarks show that the proposed approach achieves up to 30%energy savings compared with other existing methods.2)A linear and exponential(sqrt2 rule)combined curve fitting(CF)is proposed for low-energy shared cache partitioning.Considering cache's inherent characteristics between cache miss rate and its size,function with an exponent of(1-sqrt2)fits the region of non-linear high-utility cache size,while linear function fits both regions of linear high-utility and low-utility cache size.With the fitted functions,a scheme is proposed with purely mathematical formulization of energy consumption,which helps fast and efficient shared cache partition.Experimental results show that CF based shared cache partitioning scheme achieves up to 34.5%energy savings compared with other traditional techniques.Moreover,the approach in this thesis has a high prediction accuracy for the shared cache miss rate and the energy.This thesis proposes the techniques of scheduling of the tasks with uncertain execution time and cache partitioning that can effectively decrease the energy consumption of the MPSoC.Cache partitioning could affect the cache miss rate of the task,and further affect the execution time of the task.And the variation in the execution time would affect the scheduling result.So the two techniques are supplementary to each other.And it would further decrease the energy consumption of the MPSoC if the two techniques are integrated globally.