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Digital Self-interference Suppression Algorithm And Experimental Verification Of Indoor 5G Full-duplex System

Posted on:2021-03-13Degree:MasterType:Thesis
Country:ChinaCandidate:Y F OuFull Text:PDF
GTID:2428330623468189Subject:Communication and Information System
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The co-time co-frequency full-duplex(CCFD)transmits and receives signals on the same time slot and frequency,which increases the bandwidth utilization rate and also brings the inevitable problem of self-interference.Digital self-interference suppression technology is adopted as a digital domain method.There are two main types of digital self-interference suppression: frequency-domain suppression and time-domain suppression.For indoor 5G scenarios,multipath is abundant.Considering the realizability,we need to study the low-complexity digital self-interference suppression problem.In addition,there are many people and activities in the room,which leads to the situation that the channel changes rapidly,requiring digital self-interference suppression have good real-time performance.For the above two problems,the specific research of the thesis is as follows:Firstly,solve the problem of low-complexity digital self-interference suppression.The thesis chooses the frequency domain digital self-interference suppression technology,but the frequency domain suppression needs to satisfy the time difference between the self-interference signal and the useful signal within the CP.The reason is that exceeding CP will cause the problem of inter-symbol interference.In order to solve this problem,we design the two-end synchronization strategy of full duplex.This strategy uses the near-end transmit time as a reference to adjust the far-end transmit time so that the self-interference signal and the useful signal arrive at the receiving antenna at the same time,thereby suppression in the frequency domain can be achieved.The two-end synchronization strategy uses a two-stage time synchronization algorithm to increase the detection probability and reduce the false alarm probability.The simulation results show that: under the Gaussian channel,4kHz frequency deviation,and the signal-to-noise ratio is-6dB,the detection performance reaches more than 95%.The performance deteriorates about 2dB on Rice channel.Secondly,solve the problem of real-time digital self-interference suppression.Design a frame structure where the mapping positions of the near-end reference signal and the far-end reference signal are orthogonal to each other.Therefore,the useful signal does not affect the self-interference channel estimation,so the self-interference channel can be estimated,thereby realizing real-time digital self-interference suppression capability.The thesis theoretically analyzes and verifies the performance of digital self-interference suppression.The results show that: under the Rice channel,the presence of useful signals has no effect on digital self-interference suppression,and the accuracy of self-interference channel estimation directly affects the performance of digital self-interference suppression.Thirdly,complete the implementation and testing of the digital self-interference suppression module.Based on FPGA to accomplish detailed structural design and process design,and in the indoor 5G scenario,build a hardware test platform to complete the performance test.Compared with the simulation results,the measured results lose about 4dB performance because of the non-ideal factors in the data calibration and the measured equipment.These non-ideal factors are different from the models in theoretical analysis.The research of the thesis is mainly to provide theoretical basis and engineering reference for solving the CCFD communication based on 5G,in order to be possible and flexible full-duplex when there is no available frequency band in the future.
Keywords/Search Tags:Full-duplex, Digital self-interference suppression, Indoor 5G, FPGA
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