Research And Implementation Of Digital Self-interference Suppression Technology For Aerospace Tracking Telemetering And Command Full-duplex System

The Co-time Co-frequency Full-Duplex(CCFD)technology doubles the utilization rate of spectrum resources,which can effectively alleviate the problem of tight spectrum resources in the Tracking Telemetering and Command(TT&C)system,but it also faces the problem of strong self-interference of useful signals caused by its own transmitted signals.Aiming at the TT&C scene,the self-interference channel presents the characteristics of sparse and multipath.This paper studies an adaptive digital self-interference suppression technology.First,a reconstruction method of self-interference channel is proposed.Since the multipath distribution of the self-interference channel is unknown,the paper adopts the idea of transform domain and combines the smoothing method with the LS channel estimation algorithm to improve the accuracy of channel estimation,obtains the time domain impulse response of the channel.The distribution and intensity of multipath channel are determined,and the prior information of the self-interference channel is provided for digital self-interference suppression.Second,a channel coefficient identification scheme based on adaptive filtering is designed.According to the reconstructed self-interference channel,a filter structure with sparsely distributed taps is designed,and the initial values of the filter coefficients are determined at the same time.Two sets of taps are respectively aligned to two clusters of multipaths with farther apart for coefficient identification.The simulation analyzes the influence of the initial value of the tap and the tap order on the convergence speed of the algorithm.The method is beneficial to reduce the tap order of the filter.Third,the factors affecting the performance of digital interference suppression are discussed.The reference signal is subtracted from the received signal after passing through the filter to complete digital interference suppression.The simulation analyzes the effects of filter structure,time synchronization offset,number of multipaths,desired signals,etc.on the performance of digital self-interference suppression.The results show that the performance of the filter with sparse tap structure is equivalent to that with all taps.When the maximum path delay is within the range that the filter can cover,the self-interference signal can be suppressed to close to the noise floor.the existence of the useful signal causes the loss of self-interference suppression performance to not exceed 0.5d B.Fourth,the realization and testing of FPGA-based digital self-interference suppression technology has been completed.The implementation structure and processing flow of each module were designed,and a full-duplex test platform was built.In actual scenarios,the performance of digital interference suppression technology in the system was tested.The results showed that: due to channel nonlinearity,thermal noise and quantization noise,Affected by non-ideal factors such as fixed-point data,the test result has a loss of 3-4d B compared with the simulation result.