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Research And Verification Of Adaptive Digital Self-interference Suppression In Co-time Co-frequency Full-duplex Systems

Posted on:2017-02-04Degree:MasterType:Thesis
Country:ChinaCandidate:X WenFull Text:PDF
GTID:2308330485484956Subject:Communication and Information System
Abstract/Summary:PDF Full Text Request
Co-time co-frequency full duplex systems which transmit and receive signals in the same frequency at the same time can double the efficiency of the spectrum resource compared with the traditional time division duplex and frequency division duplex systems.The transmission and reception of signals in the same frequency at the same time lead to the strong self-interference in full duplex systems. According to the current research, antenna self-interference suppression, in conjunction with RF self-interference suppression and digital self-interference suppression, is employed in full duplex systems for self-interference cancellation, to ensure the correct demodulation of the desired signal. The adaptive filtering digital self-interference cancellation technique is studied in this thesis, and the simulation, FPGA implementation and verification of the digital self-interference suppression are completed, the details are as follows:Firstly, the Recursive Least Square(RLS) digital self-interference suppression algorithm is analyzed and simulated, the RLS digital self-interference cancellation simulation model is built based on the microwave full duplex system, the performance influenced by forgetting factor, desired signal, synchronization offset, filter order and interference to noise ratio is analyzed and simulated. Simulation results show that: self-interference can theoretically canceled to noise floor without the interference caused by the desired signal, the self-interference suppression performance loss of a RLS filter with 24 coefficients is within 1dB when synchronization offset varied from-12 to 5 samples. The existence of the desired signal can deteriorate the self-interference cancellation performance, and the performance loss is 1dB when forgetting factor is 0.99999.Secondly,the RLS digital self-interference suppression model is designed and implemented. The RLS digital self-interference suppression model is designed based on the microwave full duplex link and the basic principles of the RLS algorithm, and the convergence property of the RLS algorithm is used to reduce the computational complexity. A new RLS digital interference cancellation structure based on data extraction to avoid the interference caused by the desired signal is defined in this paper, and the FPGA implementation and the detailed implementation processes of the key modules are presented.Finally, the interference cancellation performance of the RLS digital interference suppression algorithm is validated on the microwave full duplex communication platform. Test results show that: the digital interference suppression performance loss is about 1.5dB compared with the theoretical results when the interference-to-noise ratio is 30 dB, and the fluctuation of the interference suppression performance is less than 1dB when synchronization offset varied from-9 to 6 samples. In this thesis, test tone signal is introduced to analyze how the interference suppression performance influenced by the feedback channel ADC dynamic and the spurious introduced in the RF interference reconstruction board.The RLS digital self-interference cancellation technology studied in this paper has been successfully used in the microwave full duplex system,which can provide a theoretical and engineering application reference for the future research and exploration of co-time co-frequency full duplex communication.
Keywords/Search Tags:Co-time co-frequency full duplex, digital self-interference cancellation, RLS algorithm, FPGA implementation
PDF Full Text Request
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