Font Size: a A A

Design Of A Low-Power Transmitter Based On Injection-Locking And Frequency Multiplication

Posted on:2020-01-27Degree:MasterType:Thesis
Country:ChinaCandidate:Y H ZhouFull Text:PDF
GTID:2428330620956103Subject:Circuits and Systems
Abstract/Summary:PDF Full Text Request
Nowadays,wireless communication system has put forward more and more stringent requirements for the performance of transmitters,conventional transmitter structures and techniques are gradually unable to meet these requirements,especially in the aspects of low power and circuit miniaturization.According to the requirements and regulations that IoT,MICS and ISM band proposed for electronic devices,a 433 MHz low-power and harmonic-rejection transmitter chip based on injection-locking and edge-combining is researched and designed in the thesis.After an explicit investigation into the development of transmitter at home and abroad,different frequency multiplication and harmonic-rejection techniques are analyzed and compared.Based on the in-depth analysis of circuit principles,injection locking with edge combining technique as well as multi-path feed-forward harmonic-rejeciton technique is employed to be the most suitable techniques for the transmitter.In order to realize inductorless design,the two techniques mentioned above are combined together and the design idea of conducting multi-path phase shift on low frequency,signal combination on high frequency is proposed.The key circuits of the transmitter are designed,including two-stage injection-locking ring oscillator(ILRO),harmonic-rejection edge combiner(HREC),data modulator and delay cells.Moreover,to understand the influence of injection locking posed on ring oscillator,a linear model is proposed for mathematical deduction.A model of the two-stage ILRO is set up to derive the lock-range of the injection and phase error reduction property of the system.Afterwards,design principle and working sequence of the core circuit,HREC are analyzed.The generation and harmonic-rejection characteristic of the stair-like waveform are also detailedly explained.Finally,the layout design is carried out using TSMC 0.18-?m CMOS process and then postsimulated after extracting parastic.The proposed transmitter can operate without any LC filtering network.Under the injection of 48.1-MHz crystal reference,the transmitter can stably output 433-MHz high frequency and the stair-like waveform achieves 28.8dBc and 25 dBc suppression on the third and fifith harmonic component,respectively.The output power and power consumption of the system is-19.5 dBm and 1.5 mW,respectively,which satisfy design specifications.
Keywords/Search Tags:Low-power Transmitter, Injection-locking, Edge-combining, Harmonic-injection, Inductorless Design
PDF Full Text Request
Related items