Design Of A 16G Fibre Channel N Port Supporting Speed Negotiation

With the development of information technology and the popularity of network technology,the arrival of the era of big data means an explosive growth in the amount of information and data.In the world of Internet of Everything,the rapid growth of data volume not only promotes the development of economy and society,but also brings challenges to the storage and transmission of data.Fibre Channel technology is widely used in high-end storage,military and aerospace electronics for its excellent features.Since the advent of Fibre Channel technology,it has grown rapidly,and the transmission rate has doubled every few years.From the original 1G standard to the current 32G standard,Fibre Channel technology has been developed for six generations.The Fibre Channel devices in the market are of different versions and support different rates.In order to improve product compatibility and meet the increasing data transmission bandwidth requirements,this thesis has designed a 16G Fibre Channel N port that supports speed negotiation.This thesis has analyzed the Fibre Channel protocol from the aspects of Fibre Channel characteristics,layering model,data structure and topology.It introduces the function of Fibre Channel N port,and focuses on the design requirements of Fibre Channel port state machine.The link speed negotiation function and the normal operation state machine are described in detail.For the hardware platform used in the design,the Xilinx Kintex Ultrascale FPGA chip has been studied,focusing on the characteristics and usage of the integrated GTH high-speed transceiver.Taking the Fibre Channel protocol as a reference,this thesis has used the Verilog hardware description language to develop the function of the Fibre Channel N-port module in the Vivado integrated development environment,and completes the design of the N-port normal operation state machine and the link speed negotiation function.Through functional simulation and hardware debugging,this thesis has tested and verified the design.Finally,this thesis has summarized the key technical points and shortcomings in the design for the follow-up work.